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Searched refs:HAUD_MISC_CSR_RESET (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/sgimips/hpc/
haudreg.h	`40 #define HAUD_MISC_CSR_RESET 0x01 /* Hard reset the DSP */`
haud.c	`684 HAUD_MISC_CSR_RESET \| HAUD_MISC_CSR_32K_SRAM); 749 HAUD_MISC_CSR_RESET \| HAUD_MISC_CSR_32K_SRAM); 790 HAUD_MISC_CSR) = HAUD_MISC_CSR_RESET \| HAUD_MISC_CSR_32K_SRAM;`

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