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  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_hdcp.c 253 I915_WRITE(HDCP_SHA_TEXT, sha_text);
327 * stream is written via the HDCP_SHA_TEXT register in 32-bit
332 * NOTE: data passed via HDCP_SHA_TEXT should be big-endian
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 9492 #define HDCP_SHA_TEXT _MMIO(0x66d18)

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