HomeSort by: relevance | last modified time | path
    Searched refs:HDMI_NV_PDISP_SOR_STATE0_REG (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/arm/nvidia/
tegra_hdmireg.h 37 #define HDMI_NV_PDISP_SOR_STATE0_REG 0x004
tegra_drm_mode.c 1017 HDMI_WRITE(tegra_encoder, HDMI_NV_PDISP_SOR_STATE0_REG, 0);
1019 HDMI_WRITE(tegra_encoder, HDMI_NV_PDISP_SOR_STATE0_REG,
1025 HDMI_WRITE(tegra_encoder, HDMI_NV_PDISP_SOR_STATE0_REG, 0);

Completed in 12 milliseconds