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    Searched refs:HPLLCC (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm/dist/shared-core/
i915_reg.h 51 #define HPLLCC 0xc0 /* 855 only */
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_cdclk.c 102 u16 hpllcc = 0; local
105 * 852GM/852GMV only supports 133 MHz and the HPLLCC
115 PCI_DEVFN(0, 3), HPLLCC, &hpllcc);
120 switch (hpllcc & GC_CLOCK_CONTROL_MASK) {
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 292 #define HPLLCC 0xc0 /* 85x only */

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