/src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
handlers.c | 2110 MMIO_D(HTOTAL(TRANSCODER_A), D_ALL); 2120 MMIO_D(HTOTAL(TRANSCODER_B), D_ALL); 2130 MMIO_D(HTOTAL(TRANSCODER_C), D_ALL); 2140 MMIO_D(HTOTAL(TRANSCODER_EDP), D_ALL);
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/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
icl_dsi.c | 803 u16 htotal, hactive, hsync_start, hsync_end, hsync_size; local in function:gen11_dsi_set_transcoder_timings 810 * Adjust horizontal timings (htotal, hsync_start, hsync_end) to account 823 htotal = DIV_ROUND_UP(adjusted_mode->crtc_htotal * mul, div); 833 vsync_shift = hsync_start - htotal / 2; 839 htotal /= 2; 853 I915_WRITE(HTOTAL(dsi_trans), 854 (hactive - 1) | ((htotal - 1) << 16));
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intel_display.c | 5654 I915_READ(HTOTAL(cpu_transcoder))); 8630 I915_WRITE(HTOTAL(cpu_transcoder), 8697 tmp = I915_READ(HTOTAL(cpu_transcoder)); 8753 mode->htotal = pipe_config->hw.adjusted_mode.crtc_htotal; 17160 mode->htotal > htotal_max) 17171 mode->htotal - mode->hdisplay < 32) 17177 if (mode->htotal - mode->hdisplay < 32) 17722 I915_WRITE(HTOTAL(pipe), (640 - 1) | ((800 - 1) << 16)); 18634 u32 htotal; member in struct:intel_display_error_state::intel_transcoder_error_state 18714 error->transcoder[i].htotal = I915_READ(HTOTAL(cpu_transcoder)) [all...] |
/src/sys/external/bsd/drm2/dist/drm/i915/ |
i915_reg.h | 4305 #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A)
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