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  /src/lib/libc/citrus/modules/
citrus_hz.h 33 _CITRUS_CTYPE_GETOPS_FUNC(HZ);
34 _CITRUS_STDENC_GETOPS_FUNC(HZ);
  /src/sys/external/bsd/drm2/include/asm/
param.h 39 #define HZ hz
  /src/sys/conf/
param.c 105 #ifndef HZ
106 #define HZ 100
113 int hz = HZ; variable
114 int tick = 1000000 / HZ;
116 int tickadj = (240000 / (60 * HZ)) ? (240000 / (60 * HZ)) : 1;
  /src/lib/i18n_module/
Makefile 3 SUBDIR= BIG5 DECHanyu EUC EUCTW GBK2K HZ ISO2022 JOHAB MSKanji UES UTF1632 UTF8 UTF7 VIQR ZW
  /src/sys/external/bsd/drm2/dist/drm/i915/selftests/
igt_flush_test.c 27 if (intel_gt_wait_for_idle(gt, HZ / 5) == -ETIME) {
  /src/sys/arch/arm/ep93xx/
epclk.c 32 * We use the 64Hz RTC interrupt as its the only thing that allows for timekeeping
37 * a broken crystal oscillator input that may make this 64Hz unreliable. However,
81 #if defined(HZ) && (HZ == 64)
145 #if defined(HZ) && (HZ == 64)
171 #if defined(HZ) && (HZ == 64)
185 * We assume that hz is either stathz or profhz, and that neither
209 #if defined(HZ) && (HZ == 64
    [all...]
  /src/sys/arch/arm/gemini/
gemini_timervar.h 38 # define STATHZ HZ
obio_timer.c 127 #if STATHZ != HZ
128 # error system clock HZ and stat clock STATHZ must be same
133 # error Specify the timer frequency in Hz with option GEMINI_TIMER_CLOCK_FREQ
246 profhz = stathz = hz;
257 profhz = stathz = hz;
  /src/sys/arch/arm/at91/
at91tctmr.c 63 #include <opt_hz.h> /* for HZ */
99 /* Match value for clock timer; running at master clock, want HZ ticks per second */
198 if (AT91_MSTCLK / 2U / HZ <= 65536) {
201 } else if (AT91_MSTCLK / 8U / HZ <= 65536) {
204 } else if (AT91_MSTCLK / 32U / HZ <= 65536) {
207 } else if (AT91_MSTCLK / 128U / HZ <= 65536) {
211 panic("%s: cannot setup timer to reach HZ", device_xname(sc->sc_dev));
213 sc->sc_divider = (sc->sc_timerclock + HZ - 1) / HZ; /* round up */
255 *We assume that hz is either stathz or profhz, and that neithe
    [all...]
at91st.c 62 #include <opt_hz.h> /* for HZ */
93 /* Match value for clock timer; running at 32.768kHz, want HZ ticks per second */
94 /* BTW, we use HZ == 64 or HZ == 128 so have a nice divisor */
97 #define AT91ST_DIVIDER (AT91_SCLK / HZ)
107 /* 256 (for HZ = 64), so we won't have overflow issues */
216 if (getticks() % (HZ * 10) == 0)
217 printf("time %i sec\n", getticks()/HZ);
234 *We assume that hz is either stathz or profhz, and that neither
  /src/sys/external/bsd/drm2/dist/drm/via/
via_video.c 115 (fx->ms / 10) * (HZ / 100),
120 (fx->ms / 10) * (HZ / 100), *lock != fx->val);
via_irq.c 254 3 * HZ,
260 3 * HZ,
267 VIA_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
272 VIA_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ,
  /src/sys/external/bsd/drm2/dist/drm/i915/gem/
i915_gem_context_types.h 158 #define CONTEXT_FAST_HANG_JIFFIES (120 * HZ) /* 3 hangs within 120s? Banned! */
i915_gem_wait.c 203 if (NSEC_PER_SEC % HZ &&
204 div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)
  /src/sys/arch/atari/conf/
SMALL030 12 options HZ=64 # Set the clock-rate (48/64/96)
ATARITT 13 options HZ=64 # Set the clock-rate (48/64/96)
FALCON 13 options HZ=64 # Set the clock-rate (48/64/96)
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_gem.h 88 #define I915_GEM_IDLE_TIMEOUT (HZ / 5)
i915_globals.c 53 schedule_delayed_work(&park.work, round_jiffies_up_relative(2 * HZ));
  /src/sys/external/bsd/drm2/dist/drm/vmwgfx/
vmwgfx_fence.h 35 #define VMW_FENCE_WAIT_TIMEOUT (5*HZ)
vmwgfx_marker.c 151 3*HZ);
  /src/sys/arch/sh3/sh3/
clock.c 56 #ifndef HZ
57 #define HZ 64
59 #define SH_RTC_CLOCK 16384 /* Hz */
63 * + default 64Hz
74 uint32_t tmuclk; /* source clock of TMU0 (Hz) */
237 hz = HZ;
238 tick = 1000000 / hz;
253 sh_clock.hz_cnt = sh_clock.tmuclk / hz - 1;
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
selftest_timeline.c 276 end_time = jiffies + HZ/10;
294 end_time = jiffies + HZ/10;
332 end_time = jiffies + HZ/10;
363 end_time = jiffies + HZ/10;
389 end_time = jiffies + HZ/10;
731 if (i915_request_wait(rq, 0, HZ / 5) < 0) {
798 if (i915_request_wait(rq, 0, HZ / 5) < 0) {
intel_gt_requests.c 217 round_jiffies_up_relative(HZ));
234 round_jiffies_up_relative(HZ));
  /src/sys/arch/mipsco/conf/
RC3230 18 options HZ=25

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