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    Searched refs:HalfValBitSize (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
CodeGenPrepare.cpp 7442 unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
7443 Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
7453 // (shl (zext HValue to i64), 32)), HalfValBitSize)
7455 // (store (or (shl (zext HValue to i64), 32)), HalfValBitSize)
7463 m_SpecificInt(HalfValBitSize))))))
7468 DL.getTypeSizeInBits(LValue->getType()) > HalfValBitSize ||
7470 DL.getTypeSizeInBits(HValue->getType()) > HalfValBitSize)
7511 Alignment = commonAlignment(Alignment, HalfValBitSize / 8);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 18103 // Match shift amount to HalfValBitSize.
18104 unsigned HalfValBitSize = Val.getValueSizeInBits() / 2;
18106 if (!ShAmt || ShAmt->getAPIntValue() != HalfValBitSize)
18113 Lo.getOperand(0).getValueSizeInBits() > HalfValBitSize ||
18116 Hi.getOperand(0).getValueSizeInBits() > HalfValBitSize)
18134 // Change the sizes of Lo and Hi's value types to HalfValBitSize.
18135 EVT VT = EVT::getIntegerVT(*DAG.getContext(), HalfValBitSize);
18144 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(HalfValBitSize / 8), DL);
18147 St0, DL, Hi, Ptr, ST->getPointerInfo().getWithOffset(HalfValBitSize / 8),

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