HomeSort by: relevance | last modified time | path
    Searched refs:HiLHS (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPURegisterBankInfo.cpp 653 Register HiLHS = MRI->createGenericVirtualRegister(HalfTy);
656 MRI->setRegBank(HiLHS, *Bank);
659 Regs.push_back(HiLHS);
663 .addDef(HiLHS)
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp 1530 SDValue LoLHS, HiLHS, LoRHS, HiRHS;
1532 GetSplitVector(N->getOperand(0), LoLHS, HiLHS);
1535 std::tie(LoLHS, HiLHS) = DAG.SplitVectorOperand(N, 0);
1543 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode();
TargetLowering.cpp 8443 SDValue HiLHS;
8449 HiLHS =
8458 HiLHS = DAG.getConstant(0, dl, VT);
8475 SDValue Args[] = { LHS, HiLHS, RHS, HiRHS };
8478 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS };
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 2957 SDValue HiLHS = DAG.getNode(ISD::SRA, dl, VT, LHS, ShiftAmt);
2959 SDValue Args[] = { HiLHS, LHS, HiRHS, RHS };

Completed in 45 milliseconds