| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| brevadd.s | 10 I2.H = 0x9000;
11 I2.L = 0;
12 I2 += M2 (BREV);
13 R2 = I2;
|
| c_dagmodik_lz_inc_dec.s | 13 imm32 i2, 0x00001200;
22 I2 += 2;
26 R2 = I2;
30 I2 += 2;
34 R6 = I2;
48 I2 -= 2;
52 R2 = I2;
56 I2 -= 2;
60 R6 = I2;
73 I2 += 4
[all...] |
| PN_generator.s | 62 loadsym I2, output;
63 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5adf );
64 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x2fc9 );
65 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0xbd91 );
66 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5520 );
67 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x80d5 );
68 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x7fef );
69 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x34d1 );
70 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x915c );
|
| c_dagmodik_lnz_imgebl.s | 13 imm32 i2, 0x00001010;
33 I2 += 2;
37 R2 = I2;
41 I2 += 2;
45 R6 = I2;
59 I2 -= 2;
63 R2 = I2;
67 I2 -= 2;
71 R6 = I2;
84 I2 += 4
[all...] |
| c_dagmodik_lnz_imltbl.s | 13 imm32 i2, 0x00001010;
33 I2 += 2;
37 R2 = I2;
41 I2 += 2;
45 R6 = I2;
59 I2 -= 2;
63 R2 = I2;
67 I2 -= 2;
71 R6 = I2;
84 I2 += 4
[all...] |
| c_dagmodim_lz_inc_dec.s | 13 imm32 i2, 0x00301010;
23 I2 += M2;
27 R2 = I2;
31 I2 += M3;
35 R6 = I2;
49 I2 -= M0;
53 R2 = I2;
57 I2 -= M1;
61 R6 = I2;
74 I2 += M1 (BREV)
[all...] |
| iir.s | 82 // array: one to load (I0) and one to store (I2). This is required since
101 // I0 and I2 are pointers to state
103 I2 = I0;
140 R0.L = ( A0 += A1 ) || [ I2 ++ ] = R5 || NOP;
147 loadsym I2, output;
148 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0028 );
149 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0110 );
150 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0373 );
151 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x075b );
152 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0c00 )
[all...] |
| c_dagmodim_lnz_imgebl.s | 13 imm32 i2, 0x00001010;
33 I2 += M2;
37 R2 = I2;
41 I2 += M3;
45 R6 = I2;
59 I2 -= M0;
63 R2 = I2;
67 I2 -= M1;
71 R6 = I2;
84 I2 += M1 (BREV)
[all...] |
| c_dagmodim_lnz_imltbl.s | 13 imm32 i2, 0x00001010;
33 I2 += M2;
37 R2 = I2;
41 I2 += M3;
45 R6 = I2;
59 I2 -= M0;
63 R2 = I2;
67 I2 -= M1;
71 R6 = I2;
84 I2 += M1 (BREV)
[all...] |
| d0.s | 22 I2 = 0x1000 (X);
27 I2 += M2;
28 R0 = I2;
|
| up0.s | 27 loadsym I2, foo;
28 P0 = I2;
32 R3.L = ( A0 = R0.L * R0.L ) || [ I2 ++ ] = R3 || NOP;
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| brevadd.s | 10 I2.H = 0x9000;
11 I2.L = 0;
12 I2 += M2 (BREV);
13 R2 = I2;
|
| c_dagmodik_lz_inc_dec.s | 13 imm32 i2, 0x00001200;
22 I2 += 2;
26 R2 = I2;
30 I2 += 2;
34 R6 = I2;
48 I2 -= 2;
52 R2 = I2;
56 I2 -= 2;
60 R6 = I2;
73 I2 += 4
[all...] |
| PN_generator.s | 62 loadsym I2, output;
63 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5adf );
64 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x2fc9 );
65 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0xbd91 );
66 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5520 );
67 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x80d5 );
68 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x7fef );
69 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x34d1 );
70 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x915c );
|
| c_dagmodik_lnz_imgebl.s | 13 imm32 i2, 0x00001010;
33 I2 += 2;
37 R2 = I2;
41 I2 += 2;
45 R6 = I2;
59 I2 -= 2;
63 R2 = I2;
67 I2 -= 2;
71 R6 = I2;
84 I2 += 4
[all...] |
| c_dagmodik_lnz_imltbl.s | 13 imm32 i2, 0x00001010;
33 I2 += 2;
37 R2 = I2;
41 I2 += 2;
45 R6 = I2;
59 I2 -= 2;
63 R2 = I2;
67 I2 -= 2;
71 R6 = I2;
84 I2 += 4
[all...] |
| c_dagmodim_lz_inc_dec.s | 13 imm32 i2, 0x00301010;
23 I2 += M2;
27 R2 = I2;
31 I2 += M3;
35 R6 = I2;
49 I2 -= M0;
53 R2 = I2;
57 I2 -= M1;
61 R6 = I2;
74 I2 += M1 (BREV)
[all...] |
| iir.s | 82 // array: one to load (I0) and one to store (I2). This is required since
101 // I0 and I2 are pointers to state
103 I2 = I0;
140 R0.L = ( A0 += A1 ) || [ I2 ++ ] = R5 || NOP;
147 loadsym I2, output;
148 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0028 );
149 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0110 );
150 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0373 );
151 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x075b );
152 R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x0c00 )
[all...] |
| c_dagmodim_lnz_imgebl.s | 13 imm32 i2, 0x00001010;
33 I2 += M2;
37 R2 = I2;
41 I2 += M3;
45 R6 = I2;
59 I2 -= M0;
63 R2 = I2;
67 I2 -= M1;
71 R6 = I2;
84 I2 += M1 (BREV)
[all...] |
| c_dagmodim_lnz_imltbl.s | 13 imm32 i2, 0x00001010;
33 I2 += M2;
37 R2 = I2;
41 I2 += M3;
45 R6 = I2;
59 I2 -= M0;
63 R2 = I2;
67 I2 -= M1;
71 R6 = I2;
84 I2 += M1 (BREV)
[all...] |
| d0.s | 22 I2 = 0x1000 (X);
27 I2 += M2;
28 R0 = I2;
|
| up0.s | 27 loadsym I2, foo;
28 P0 = I2;
32 R3.L = ( A0 = R0.L * R0.L ) || [ I2 ++ ] = R3 || NOP;
|
| /src/share/misc/ |
| make.country | 30 I2=country_names_and_code_elements_txt
31 U2=http://www.iso.org/iso/$I2
33 trap "rm -f $I1 $I2 $O1 $O2" 0 1 2 3 15
51 grep ';[A-Z][A-Z]' $I2 |
|
| /src/sys/rump/librump/rumpkern/ |
| atomic_cas_generic.c | 44 #define I2 __SIMPLELOCK_UNLOCKED, __SIMPLELOCK_UNLOCKED,
45 #define I16 I2 I2 I2 I2 I2 I2 I2 I2
|
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| PostDominators.cpp | 55 const Instruction *I2) const {
56 assert(I1 && I2 && "Expecting valid I1 and I2");
59 const BasicBlock *BB2 = I2->getParent();
65 if (isa<PHINode>(I1) && isa<PHINode>(I2))
68 // Loop through the basic block until we find I1 or I2.
70 for (; &*I != I1 && &*I != I2; ++I)
73 return &*I == I2;
|
