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    Searched refs:I32 (Results 1 - 25 of 25) sorted by relevancy

  /src/sys/lib/libsa/
loadfile_elf32.c 83 #define I32(f) \
95 I32(ehdr->e_version);
96 I32(ehdr->e_entry);
97 I32(ehdr->e_phoff);
98 I32(ehdr->e_shoff);
99 I32(ehdr->e_flags);
109 I32(ehdr->e_version);
113 I32(ehdr->e_flags);
167 I32(phdr->p_type);
168 I32(phdr->p_offset)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Utils/
WebAssemblyTypeUtilities.h 29 I32 = unsigned(wasm::ValType::I32),
WebAssemblyTypeUtilities.cpp 22 if (Type == "i32")
23 return wasm::ValType::I32;
50 .Case("i32", WebAssembly::BlockType::I32)
63 .Case("i32", MVT::i32)
82 return "i32";
129 case MVT::i32:
130 return wasm::ValType::I32;
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyRuntimeLibcallSignatures.cpp 524 Subtarget.hasAddr64() ? wasm::ValType::I64 : wasm::ValType::I32;
540 Params.push_back(wasm::ValType::I32);
548 Params.push_back(wasm::ValType::I32);
560 Params.push_back(wasm::ValType::I32);
567 Rets.push_back(wasm::ValType::I32);
571 Rets.push_back(wasm::ValType::I32);
575 Rets.push_back(wasm::ValType::I32);
576 Params.push_back(wasm::ValType::I32);
598 Params.push_back(wasm::ValType::I32);
613 Params.push_back(wasm::ValType::I32);
    [all...]
WebAssemblyFastISel.cpp 128 return MVT::i32;
129 case MVT::i32:
455 case MVT::i32:
485 case MVT::i32:
527 if (To == MVT::i32)
549 if (To == MVT::i32)
667 case MVT::i32:
783 case MVT::i32:
884 // CALL_INDIRECT takes an i32, but in wasm64 we represent function pointers
933 case MVT::i32
    [all...]
WebAssemblyMCInstLower.cpp 130 // All C++ exceptions are assumed to have a single i32 (for wasm32) or i64
135 : wasm::ValType::I32);
212 return wasm::ValType::I32;
WebAssemblyAsmPrinter.cpp 63 for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64, MVT::v16i8, MVT::v8i16,
92 // example, for a function that takes an i32 and returns nothing, it is
113 case wasm::ValType::I32:
  /src/external/gpl3/binutils/dist/opcodes/
mips16-opc.c 202 #define I32 INSN_ISA32
338 {"jalrc", "x", 0xe8c0, 0xf8ff, RD_1|WR_31|NODS, SH|UBR, I32, 0, 0 },
339 {"jalrc", "R,x", 0xe8c0, 0xf8ff, RD_2|WR_31|NODS, SH|UBR, I32, 0, 0 },
340 {"jrc", "x", 0xe880, 0xf8ff, RD_1|NODS, SH|UBR, I32, 0, 0 },
341 {"jrc", "R", 0xe8a0, 0xffff, NODS, SH|RD_31|UBR, I32, 0, 0 },
447 {"restore", "m", 0x6400, 0xff80, WR_31|NODS, MOD_SP, I32, 0, 0 },
448 {"save", "m", 0x6480, 0xff80, NODS, RD_31|MOD_SP, I32, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 },
450 {"sdbbp", "6", 0xe801, 0xf81f, TRAP, SH, I32, 0, 0 },
451 {"seb", "x", 0xe891, 0xf8ff, MOD_1, SH, I32, 0, 0 }
    [all...]
fr30-opc.c 504 /* ldi:32 $i32,$Ri */
507 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
1215 /* ldi32 $i32,$Ri */
1238 /* ldi32 $i32,$Ri */
1241 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
  /src/external/gpl3/binutils.old/dist/opcodes/
mips16-opc.c 202 #define I32 INSN_ISA32
338 {"jalrc", "x", 0xe8c0, 0xf8ff, RD_1|WR_31|NODS, SH|UBR, I32, 0, 0 },
339 {"jalrc", "R,x", 0xe8c0, 0xf8ff, RD_2|WR_31|NODS, SH|UBR, I32, 0, 0 },
340 {"jrc", "x", 0xe880, 0xf8ff, RD_1|NODS, SH|UBR, I32, 0, 0 },
341 {"jrc", "R", 0xe8a0, 0xffff, NODS, SH|RD_31|UBR, I32, 0, 0 },
447 {"restore", "m", 0x6400, 0xff80, WR_31|NODS, MOD_SP, I32, 0, 0 },
448 {"save", "m", 0x6480, 0xff80, NODS, RD_31|MOD_SP, I32, 0, 0 },
449 {"sdbbp", "", 0xe801, 0xffff, TRAP, SH, I32, 0, 0 },
450 {"sdbbp", "6", 0xe801, 0xf81f, TRAP, SH, I32, 0, 0 },
451 {"seb", "x", 0xe891, 0xf8ff, MOD_1, SH, I32, 0, 0 }
    [all...]
fr30-opc.c 504 /* ldi:32 $i32,$Ri */
507 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
1215 /* ldi32 $i32,$Ri */
1238 /* ldi32 $i32,$Ri */
1241 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULowerModuleLDSPass.cpp 232 Type *I32 = Type::getInt32Ty(Ctx);
235 Constant *GEPIdx[] = {ConstantInt::get(I32, 0), ConstantInt::get(I32, I)};
AMDGPULibFunc.cpp 382 P.ArgType = AMDGPULibFunc::I32; P.VectorSize = 4; break;
419 P.ArgType = AMDGPULibFunc::I32; break;
438 P.ArgType = AMDGPULibFunc::I32;
625 case 'i': res.ArgType = AMDGPULibFunc::I32; break;
731 case AMDGPULibFunc::I32: return "i";
879 case AMDGPULibFunc::I32: T = Type::getInt32Ty(C); break;
AMDGPULibFunc.h 268 I32 = INT | B32,
AMDGPUCodeGenPrepare.cpp 88 /// if \p T is i7, then i32 is returned; if \p T is <3 x i12>, then <3 x i32>
231 assert(needsPromotionToI32(T) && "T does not need promotion to i32");
239 assert(needsPromotionToI32(T) && "T does not need promotion to i32");
276 // Return true if the op promoted to i32 should have nsw set.
290 // Return true if the op promoted to i32 should have nuw set.
315 "I does not need promotion to i32");
362 "I does not need promotion to i32");
389 "I does not need promotion to i32");
421 "I does not need promotion to i32");
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/Demangle/
RustDemangle.h 36 I32,
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
LoopDataPrefetch.cpp 398 Type *I32 = Type::getInt32Ty(BB->getContext());
404 ConstantInt::get(I32, P.Writes),
405 ConstantInt::get(I32, 3), ConstantInt::get(I32, 1)});
  /src/external/apache2/llvm/dist/llvm/lib/Demangle/
RustDemangle.cpp 261 // | "l" // i32
303 Type = BasicType::I32;
357 case BasicType::I32:
358 print("i32");
535 case BasicType::I32:
  /src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/
Wasm.h 393 I32 = WASM_TYPE_I32,
  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
AMDGPUMetadata.h 102 I32 = 6,
  /src/external/apache2/llvm/dist/llvm/tools/llvm-stress/
llvm-stress.cpp 100 "(always includes i1, i8, i16, i32, i64, float and double)"));
506 Type *I32 = Type::getInt32Ty(BB->getContext());
508 Constant *CI = ConstantInt::get(I32, getRandom() % (Width*2));
511 CI = UndefValue::get(I32);
  /src/external/apache2/llvm/dist/llvm/lib/Support/
AMDGPUMetadata.cpp 82 YIO.enumCase(EN, "I32", ValueType::I32);
  /src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
WasmYAML.cpp 582 ECase(I32);
  /src/external/gpl3/binutils/dist/gas/config/
tc-arm.c 1452 .i32.i32.s16
7701 case OP_RRnpcsp_I32: po_reg_or_goto (REG_TYPE_RN, I32); break;
7702 I32: po_imm_or_fail (1, 32, false); break;
24505 TCE("ssat", 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
24685 TCE("bfc", 7c0001f, f36f0000, 3, (RRnpc, I31, I32), bfc, t_bfc),
24686 TCE("bfi", 7c00010, f3600000, 4, (RRnpc, RRnpc_I0, I31, I32), bfi, t_bfi),
24687 TCE("sbfx", 7a00050, f3400000, 4, (RR, RR, I31, I32), bfx, t_bfx),
24688 TCE("ubfx", 7e00050, f3c00000, 4, (RR, RR, I31, I32), bfx, t_bfx),
25115 shl should accept I8 I16 I32 I64
    [all...]
  /src/external/gpl3/binutils.old/dist/gas/config/
tc-arm.c 1456 .i32.i32.s16
7704 case OP_RRnpcsp_I32: po_reg_or_goto (REG_TYPE_RN, I32); break;
7705 I32: po_imm_or_fail (1, 32, false); break;
24508 TCE("ssat", 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
24688 TCE("bfc", 7c0001f, f36f0000, 3, (RRnpc, I31, I32), bfc, t_bfc),
24689 TCE("bfi", 7c00010, f3600000, 4, (RRnpc, RRnpc_I0, I31, I32), bfi, t_bfi),
24690 TCE("sbfx", 7a00050, f3400000, 4, (RR, RR, I31, I32), bfx, t_bfx),
24691 TCE("ubfx", 7e00050, f3c00000, 4, (RR, RR, I31, I32), bfx, t_bfx),
25118 shl should accept I8 I16 I32 I64
    [all...]

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