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    Searched refs:IC_REQUEST0_INT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/mips/alchemy/
au_icu.c	332 * (level & 2 == 0) ? IC_REQUEST0_INT : IC_REQUEST1_INT); 340 irqstat = REGVAL(icu_base + IC_REQUEST0_INT); 348 irqstat = REGVAL(icu_base + IC_REQUEST0_INT);
/src/sys/arch/mips/alchemy/include/
aureg.h	92 #define IC_REQUEST0_INT 0x54 /* Show active interrupts on request 0 */

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