| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_si_ih.c | 40 u32 ih_cntl = RREG32(IH_CNTL); local in function:si_ih_enable_interrupts
43 ih_cntl |= ENABLE_INTR;
45 WREG32(IH_CNTL, ih_cntl);
53 u32 ih_cntl = RREG32(IH_CNTL); local in function:si_ih_disable_interrupts
56 ih_cntl &= ~ENABLE_INTR;
58 WREG32(IH_CNTL, ih_cntl);
69 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:si_ih_irq_init
[all...] |
| amdgpu_cz_ih.c | 67 u32 ih_cntl = RREG32(mmIH_CNTL); local in function:cz_ih_enable_interrupts
70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
72 WREG32(mmIH_CNTL, ih_cntl);
87 u32 ih_cntl = RREG32(mmIH_CNTL); local in function:cz_ih_disable_interrupts
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
92 WREG32(mmIH_CNTL, ih_cntl);
114 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:cz_ih_irq_init
[all...] |
| amdgpu_iceland_ih.c | 67 u32 ih_cntl = RREG32(mmIH_CNTL); local in function:iceland_ih_enable_interrupts
70 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 1);
72 WREG32(mmIH_CNTL, ih_cntl);
87 u32 ih_cntl = RREG32(mmIH_CNTL); local in function:iceland_ih_disable_interrupts
90 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL, ENABLE_INTR, 0);
92 WREG32(mmIH_CNTL, ih_cntl);
115 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:iceland_ih_irq_init
[all...] |
| sid.h | 672 #define IH_CNTL 0xF86
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_r600.c | 3628 u32 ih_cntl = RREG32(IH_CNTL); local in function:r600_enable_interrupts
3631 ih_cntl |= ENABLE_INTR;
3633 WREG32(IH_CNTL, ih_cntl);
3641 u32 ih_cntl = RREG32(IH_CNTL); local in function:r600_disable_interrupts
3644 ih_cntl &= ~ENABLE_INTR;
3646 WREG32(IH_CNTL, ih_cntl);
3711 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:r600_irq_init
[all...] |
| radeon_si.c | 5929 u32 ih_cntl = RREG32(IH_CNTL); local in function:si_enable_interrupts
5932 ih_cntl |= ENABLE_INTR;
5934 WREG32(IH_CNTL, ih_cntl);
5942 u32 ih_cntl = RREG32(IH_CNTL); local in function:si_disable_interrupts
5945 ih_cntl &= ~ENABLE_INTR;
5947 WREG32(IH_CNTL, ih_cntl);
5989 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:si_irq_init
[all...] |
| cikd.h | 818 #define IH_CNTL 0x3e18
|
| sid.h | 668 #define IH_CNTL 0x3e18
|
| radeon_cik.c | 6842 u32 ih_cntl = RREG32(IH_CNTL); local in function:cik_enable_interrupts
6845 ih_cntl |= ENABLE_INTR;
6847 WREG32(IH_CNTL, ih_cntl);
6862 u32 ih_cntl = RREG32(IH_CNTL); local in function:cik_disable_interrupts
6865 ih_cntl &= ~ENABLE_INTR;
6867 WREG32(IH_CNTL, ih_cntl);
6967 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; local in function:cik_irq_init
[all...] |
| evergreend.h | 1237 #define IH_CNTL 0x3e18
|
| r600d.h | 676 #define IH_CNTL 0x3e18
|
