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    Searched refs:IMR (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm/dist/shared-core/
i915_irq.c 40 * we leave them always unmasked in IMR and then control enabling them through
61 I915_WRITE(IMR, dev_priv->irq_mask_reg);
62 (void) I915_READ(IMR);
72 I915_WRITE(IMR, dev_priv->irq_mask_reg);
73 (void) I915_READ(IMR);
478 I915_WRITE(IMR, 0xffffffff);
505 I915_WRITE(IMR, dev_priv->irq_mask_reg);
530 I915_WRITE(IMR, 0xffffffff);
i915_suspend.c 339 dev_priv->saveIMR = I915_READ(IMR);
i915_reg.h 211 #define IMR 0x020a8
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_irq.h 126 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
132 i915_reg_t imr, u32 imr_val,
144 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
160 type##IMR, imr_val, \
  /src/sys/arch/evbarm/stand/boot2440/
dm9000.c 106 #define IMR 0xff /* interrupt mask */
206 CSR_WRITE_1(l, IMR, 0);
288 CSR_WRITE_1(l, IMR, IMR_PAR);
  /src/sys/arch/x68k/dev/
mha.c 183 #define IMR (sc->sc_pcx[12])
372 IMR = 0x00;

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