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    Searched refs:IPL (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/arch/mvme68k/stand/sboot/
start.s 51 movl #0x2c, %d4 | flags for IPL
  /src/sys/arch/vax/vax/
intvec.S 119 INTVEC(astintr, KSTACK) # Asynchronous Sustem Trap, AST (IPL 02)
125 INTVEC(softclock, KSTACK); # Software clock interrupt, A0 (IPL 08)
126 NOVEC; # Unused, A4 (IPL 09)
127 NOVEC; # Unused, A8 (IPL 10)
128 INTVEC(softbio, KSTACK); # Software bio interrupt, AC (IPL 11)
129 INTVEC(softnet, KSTACK); # Software net interrupt, B0 (IPL 12)
130 INTVEC(softserial, KSTACK); # Software serial interrupt, B4 (IPL 13)
131 NOVEC; # Unused, B8 (IPL 14)
132 INTVEC(ddbtrap, ISTACK) # Kernel debugger trap, BC (IPL 15)
subr.S 238 pushl %r0 # Save old IPL
308 * R7 contains ipl to dispatch with
310 movq %r6,-(%sp) /* push old lwp and ipl onto stack */
352 movl %r1,PCB_R7(%r3) /* move IPL into new pcb */
  /src/sys/arch/mips/rmi/
rmixl_spl.S 106 * a0 = EIMR bits requested to be set for this IPL
107 * a1 = this IPL (IPL_*)
109 * old IPL is returned in v0
115 INT_L v0, CPU_INFO_CPL(a3) ## get current IPL from cpu_info
119 INT_S a1, CPU_INFO_CPL(a3) ## save IPL in cpu_info
129 sll a2, a0, MAP_SCALESHIFT # convert IPL to array offset
131 REG_L v1, (v1) # load EIMR bits for this IPL
136 INT_S a0, CPU_INFO_CPL(a3) ## save IPL in cpu_info
147 INT_S zero, CPU_INFO_CPL(a3) ## save IPL in cpu_info
201 INT_L v0, CPU_INFO_CPL(a3) ## old IPL for return valu
    [all...]
  /src/usr.sbin/acpitools/acpidump/
acpidump.h 96 IPL,
acpi.c 157 "IPL",
158 "IPL Partition Data",
3418 case IPL:
  /src/sys/arch/x68k/stand/xxboot/
boot.S 4 | (1) IPL (or previous stage loader) loads first 1KB of this primary
95 | of the IPL (or the previous bootloader). At this point
101 | Initialize the screen. Some IPL (060turbo ROM or genuine
273 | SCSI IPL or BOOT MENU.
  /src/sys/arch/mips/mips/
spl.S 67 * a0 = SR bits to be cleared for this IPL
68 * a1 = this IPL (IPL_*)
73 INT_L v0, CPU_INFO_CPL(a3) # get current IPL from cpu_info
81 xor a0, v1 # disable ipl's masked bits
95 INT_S a1, CPU_INFO_CPL(a3) # save IPL in cpu_info
122 INT_L a2, CPU_INFO_CPL(a3) # get IPL from cpu_info
132 sll a2, a0, INT_SCALESHIFT # convert IPL to array offset
134 INT_L a1, (v1) # load SR bits for this IPL
138 or v1, a1 # set any bits for this IPL
148 INT_S a0, CPU_INFO_CPL(a3) # save IPL in cpu_info (KSEG0
    [all...]
  /src/sys/arch/x68k/stand/boot_ufs/
boot.S 8 | (1) IPL (or previous stage loader) loads first 1KB of this primary
218 | No other IPL is supported. XXX FIXME
323 | Initialize the screen here. Some IPL (060turbo ROM or
  /src/sys/arch/hppa/stand/xxboot/
start.S 43 ; ipl part 1 starts here
47 ; IPL startup
50 ; arg1 = address of first doubleword past the end of ipl part 1
104 ; read part 2 and 3 of ipl (see README.ipl)
107 ; read disk blocks which contains ipl part 2 and part 3
140 ; Now, whole the IPL is loaded
  /src/sys/arch/luna68k/stand/boot/
locore.S 602 andw #PSL_IPL7,%d0 | mask all but IPL
  /src/sys/arch/amiga/amiga/
locore.s 156 movw #PSL_HIGHIPL,%sr | hardclock at high IPL
176 movw #PSL_HIGHIPL,%sr | run clock at high ipl
  /src/sys/arch/sparc64/sparc64/
locore.s 1284 /* prevent panic() from lowering ipl */
3977 * Enable traps but set ipl high so that we will not
4081 * is proper. We must also be sure not to lower ipl (it is at splhigh())
4083 * new ipl before noticing that PSR_ET has been turned off. We are on
4337 sll %g6, PTRSHFT, %g3 ! Find start of table for this IPL
4631 rdpr %tt, %l5 ! Find out our current IPL
4889 wrpr %g0, %g0, %pil ! Lower IPL
6809 * call to switch(). Just set psr ipl and return.
6838 mov %l7, %o1 ! o1/i1 = ipl
6890 wrpr %g0, %l7, %pil ! restore ipl
    [all...]

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