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    Searched refs:IPS_CTL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_display.c 6238 * value in IPS_CTL bit 31 after enabling IPS through the
6243 I915_WRITE(IPS_CTL, IPS_ENABLE);
6248 * IPS_CTL value is not the one we read. */
6249 if (intel_de_wait_for_set(dev_priv, IPS_CTL, IPS_ENABLE, 50))
6270 if (intel_de_wait_for_clear(dev_priv, IPS_CTL, IPS_ENABLE, 100))
6273 I915_WRITE(IPS_CTL, 0);
6274 POSTING_READ(IPS_CTL);
6305 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
6332 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
11061 pipe_config->ips_enabled = I915_READ(IPS_CTL) & IPS_ENABLE
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_debugfs.c 1333 if (I915_READ(IPS_CTL) & IPS_ENABLE)
i915_reg.h 3287 #define IPS_CTL _MMIO(0x43408)
9021 /* See also IPS_CTL */
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
handlers.c 2355 MMIO_D(IPS_CTL, D_ALL);

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