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    Searched refs:IPU_CM_CH_DB_MODE_SEL_0 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/imx/
imx51_ipuv3.c	851 reg = IPUV3_READ(sc, cm, IPU_CM_CH_DB_MODE_SEL_0); 853 IPUV3_WRITE(sc, cm, IPU_CM_CH_DB_MODE_SEL_0, reg);
imx51_ipuv3reg.h	126 #define IPU_CM_CH_DB_MODE_SEL_0 0x00000150

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