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Searched refs:IPU_DI_SW_GEN0 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/imx/
imx51_ipuv3.c	`339 IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(no), reg_gen0); 349 IPU_DI_SW_GEN0(no), reg_gen0); 449 IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(6), 0); 451 IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(7), 0); 453 IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(8), 0); 455 IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(9), 0);`
imx51_ipuv3reg.h	`278 #define IPU_DI_SW_GEN0(n) (0x0000000c + ((n) - 1) * 4)`

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