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    Searched refs:IdxN (Results 1 - 7 of 7) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp 387 Register IdxN = getRegForValue(Idx);
388 if (!IdxN)
396 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN);
398 IdxN =
399 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN);
401 return IdxN;
579 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue();
580 TotalOffs += DL.getTypeAllocSize(Ty) * IdxN;
598 Register IdxN = getRegForGEPIndex(Idx)
    [all...]
SelectionDAGBuilder.cpp 3921 SDValue IdxN = getValue(Idx);
3923 if (!IdxN.getValueType().isVector() && IsVectorGEP) {
3924 EVT VT = EVT::getVectorVT(*Context, IdxN.getValueType(),
3927 IdxN = DAG.getSplatVector(VT, dl, IdxN);
3929 IdxN = DAG.getSplatBuildVector(VT, dl, IdxN);
3934 IdxN = DAG.getSExtOrTrunc(IdxN, dl, N.getValueType());
3943 IdxN = DAG.getNode(ISD::MUL, dl, N.getValueType(), IdxN, VScale)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLoweringHVX.cpp 527 auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode());
528 if (IdxN && IdxN->isNullValue())
1067 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode());
1068 if (!IdxN || !IdxN->isNullValue()) {
1091 if (RolBase != 4 || !IdxN || !IdxN->isNullValue()) {
1127 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV.getNode());
1128 if (!IdxN || !IdxN->isNullValue())
    [all...]
HexagonISelLowering.cpp 2511 auto *IdxN = dyn_cast<ConstantSDNode>(IdxV);
2519 if (IdxN) {
2523 if (IdxN->isNullValue() && ValTy.getSizeInBits() == 1)
2569 if (IdxN) {
2570 unsigned Off = IdxN->getZExtValue() * ElemWidth;
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineCalls.cpp 1864 unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue();
1866 // The result of this call is undefined if IdxN is not a constant multiple
1868 if (IdxN % SubVecNumElts != 0 || IdxN + SubVecNumElts > VecNumElts) {
1893 for (unsigned i = 0; i != IdxN; ++i)
1897 for (unsigned i = IdxN + SubVecNumElts; i != DstNumElts; ++i)
1918 unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue();
1920 // The result of this call is undefined if IdxN is not a constant multiple
1923 if (IdxN % DstNumElts != 0 || IdxN + DstNumElts > VecNumElts)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 4864 unsigned IdxN = getRegForValue(Idx);
4865 if (IdxN == 0)
4873 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false);
4876 return IdxN;
4924 unsigned IdxN = getRegForGEPIndex(Idx);
4925 if (!IdxN)
4932 IdxN = emitMul_rr(VT, IdxN, C);
4933 if (!IdxN)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
InstructionSimplify.cpp 5632 unsigned IdxN = cast<ConstantInt>(Op1)->getZExtValue();
5636 IdxN == 0 && X->getType() == ReturnType)
5744 unsigned IdxN = cast<ConstantInt>(Idx)->getZExtValue();
5748 (Q.isUndefValue(Vec) || Vec == X) && IdxN == 0 &&

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