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    Searched refs:IdxSize (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
DAGISelMatcherEmitter.cpp 530 unsigned IdxSize;
533 IdxSize = 2; // size of opcode in table is 2 bytes.
536 IdxSize = 1; // size of type in table is 1 byte.
549 CurrentIdx += EmitVBRValue(ChildSize, OS) + IdxSize;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPURegisterBankInfo.cpp 3741 unsigned IdxSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
3749 OpdsMapping[2] = AMDGPU::getValueMapping(IdxBank, IdxSize);
3758 unsigned IdxSize = MRI.getType(MI.getOperand(3).getReg()).getSizeInBits();
3776 OpdsMapping[3] = AMDGPU::getValueMapping(IdxBankID, IdxSize);
4033 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits();
4035 OpdsMapping[3] = AMDGPU::getValueMapping(IdxBank, IdxSize);
4051 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits();
4058 OpdsMapping[3] = AMDGPU::getValueMapping(IdxBank, IdxSize);
  /src/external/apache2/llvm/dist/llvm/lib/IR/
AutoUpgrade.cpp 510 unsigned IdxSize = Idx->getPrimitiveSizeInBits();
513 if (EltSize == 64 && IdxSize == 128)
515 else if (EltSize == 32 && IdxSize == 128)
517 else if (EltSize == 64 && IdxSize == 256)
2725 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
2726 unsigned IdxMask = ((1 << IdxSize) - 1);
2733 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.cpp 3878 // IdxSize is the width of the arithmetic according to IR semantics.
3881 unsigned IdxSize = DAG.getDataLayout().getIndexSizeInBits(AS);
3882 MVT IdxTy = MVT::getIntegerVT(IdxSize);
3886 APInt ElementMul(IdxSize, ElementSize.getKnownMinSize());
3899 APInt Offs = ElementMul * CI->getValue().sextOrTrunc(IdxSize);

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