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    Searched refs:InOp (Results 1 - 8 of 8) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXProxyRegErasure.cpp 96 auto &InOp = *MI.uses().begin();
99 assert(InOp.isReg() && "ProxyReg input operand should be a register.");
104 replaceRegisterUsage(I, OutOp, InOp);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp 306 SDValue InOp = N->getOperand(0);
310 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
311 return InOp;
433 SDValue InOp = N->getOperand(0);
434 if (InOp.getValueType() != EltVT)
435 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
436 return InOp;
1167 SDValue InOp = N->getOperand(0);
1168 EVT InVT = InOp.getValueType();
1186 GetExpandedOp(InOp, Lo, Hi)
    [all...]
LegalizeTypesGeneric.cpp 43 SDValue InOp = N->getOperand(0);
44 EVT InVT = InOp.getValueType();
57 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
65 GetExpandedOp(InOp, Lo, Hi);
74 GetSplitVector(InOp, Lo, Hi);
82 SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
90 InOp = GetWidenedVector(InOp);
93 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
121 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
    [all...]
LegalizeIntegerTypes.cpp 336 SDValue InOp = N->getOperand(0);
337 EVT InVT = InOp.getValueType();
349 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
353 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
356 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftPromotedHalf(InOp));
360 return DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, GetPromotedFloat(InOp));
370 BitConvertToInteger(GetScalarizedVector(InOp)));
386 InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
390 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
400 DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
    [all...]
LegalizeTypes.h 981 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
DAGCombiner.cpp 18535 SDValue InOp = VecOp.getOperand(0);
18536 if (InOp.getValueType() != ScalarVT) {
18537 assert(InOp.getValueType().isInteger() && ScalarVT.isInteger());
18538 return DAG.getSExtOrTrunc(InOp, DL, ScalarVT);
18540 return InOp;
18643 SDValue InOp = SVInVec.getOperand(OrigElt);
18644 if (InOp.getValueType() != ScalarVT) {
18645 assert(InOp.getValueType().isInteger() && ScalarVT.isInteger());
18646 InOp = DAG.getSExtOrTrunc(InOp, DL, ScalarVT)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 3752 SDValue InOp = Op.getOperand(1);
3753 EVT InVT = InOp.getValueType();
3758 return InOp;
3761 DAG.getNode(AArch64ISD::REINTERPRET_CAST, DL, OutVT, InOp);
3765 switch (InOp.getOpcode()) {
3769 if (InOp.getConstantOperandVal(0) == Intrinsic::aarch64_sve_ptrue)

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