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    Searched refs:InstrDesc (Results 1 - 15 of 15) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
InstrBuilder.h 30 /// Every llvm-mca Instruction is described by an object of class InstrDesc.
31 /// An InstrDesc describes which registers are read/written by the instruction,
35 /// descriptors (i.e. InstrDesc objects).
45 DenseMap<unsigned short, std::unique_ptr<const InstrDesc>> Descriptors;
46 DenseMap<const MCInst *, std::unique_ptr<const InstrDesc>> VariantDescriptors;
51 Expected<const InstrDesc &> createInstrDescImpl(const MCInst &MCI);
52 Expected<const InstrDesc &> getOrCreateInstrDesc(const MCInst &MCI);
57 void populateWrites(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
58 void populateReads(InstrDesc &ID, const MCInst &MCI, unsigned SchedClassID);
59 Error verifyInstrDesc(const InstrDesc &ID, const MCInst &MCI) const
    [all...]
Instruction.h 332 /// Helper used by class InstrDesc to describe how hardware resources
348 struct InstrDesc {
368 // SchedClassID used to construct this InstrDesc.
387 InstrDesc() = default;
388 InstrDesc(const InstrDesc &Other) = delete;
389 InstrDesc &operator=(const InstrDesc &Other) = delete;
397 const InstrDesc &Desc;
413 InstructionBase(const InstrDesc &D) : Desc(D), IsOptimizableMove(false) {
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  /src/external/apache2/llvm/dist/llvm/tools/llvm-cfi-verify/lib/
FileAnalysis.cpp 170 const auto &InstrDesc = MII->get(InstrMeta.Instruction.getOpcode());
171 return InstrDesc.isTrap() || willTrapOnCFIViolation(InstrMeta);
175 const auto &InstrDesc = MII->get(InstrMeta.Instruction.getOpcode());
176 if (!InstrDesc.isCall())
192 const auto &InstrDesc = MII->get(InstrMeta.Instruction.getOpcode());
193 if (InstrDesc.mayAffectControlFlow(InstrMeta.Instruction, *RegisterInfo))
194 return InstrDesc.isConditionalBranch();
207 const auto &InstrDesc = MII->get(InstrMeta.Instruction.getOpcode());
209 if (InstrDesc.mayAffectControlFlow(InstrMeta.Instruction, *RegisterInfo)) {
210 if (InstrDesc.isConditionalBranch()
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  /src/external/apache2/llvm/dist/llvm/lib/MCA/
InstrBuilder.cpp 38 static void initializeUsedResources(InstrDesc &ID,
206 static void computeMaxLatency(InstrDesc &ID, const MCInstrDesc &MCDesc,
250 void InstrBuilder::populateWrites(InstrDesc &ID, const MCInst &MCI,
427 void InstrBuilder::populateReads(InstrDesc &ID, const MCInst &MCI,
493 Error InstrBuilder::verifyInstrDesc(const InstrDesc &ID,
510 Expected<const InstrDesc &>
549 std::unique_ptr<InstrDesc> ID = std::make_unique<InstrDesc>();
602 Expected<const InstrDesc &>
615 Expected<const InstrDesc &> DescOrErr = getOrCreateInstrDesc(MCI)
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  /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
InstructionTables.cpp 23 const InstrDesc &Desc = IR.getInstruction()->getDesc();
DispatchStage.cpp 81 const InstrDesc &Desc = IS.getDesc();
162 const InstrDesc &Desc = Inst.getDesc();
InOrderIssueStage.cpp 41 const InstrDesc &Desc = Inst.getDesc();
225 const InstrDesc &Desc = IS.getDesc();
ExecuteStage.cpp 168 const InstrDesc &Desc = Inst.getDesc();
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/
llvm-exegesis.cpp 253 const MCInstrDesc &InstrDesc = Instr.Description;
255 if (InstrDesc.isPseudo() || InstrDesc.usesCustomInsertionHook())
258 if (InstrDesc.isBranch() || InstrDesc.isIndirectBranch())
260 if (InstrDesc.isCall() || InstrDesc.isReturn())
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/
ResourceManager.h 426 uint64_t checkAvailability(const InstrDesc &Desc) const;
432 const InstrDesc &Desc,
  /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
LSUnit.cpp 70 const InstrDesc &Desc = IR.getInstruction()->getDesc();
196 const InstrDesc &Desc = IR.getInstruction()->getDesc();
214 const InstrDesc &Desc = IR.getInstruction()->getDesc();
Scheduler.cpp 74 const InstrDesc &D = IS->getDesc();
291 const InstrDesc &Desc = IR.getInstruction()->getDesc();
ResourceManager.cpp 282 uint64_t ResourceManager::checkAvailability(const InstrDesc &Desc) const {
298 const InstrDesc &Desc,
  /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/
SummaryView.cpp 55 const InstrDesc &Desc = Inst.getDesc();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp 4726 const MCInstrDesc &InstrDesc = get(Opc);
4739 isLiteralConstantLike(Src0, InstrDesc.OpInfo[Src0Idx])))
4772 if (isLegalRegOperand(MRI, InstrDesc.OpInfo[Src1Idx], Src1))
4803 !isLegalRegOperand(MRI, InstrDesc.OpInfo[Src1Idx], Src0)) {

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