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  /src/external/apache2/llvm/dist/llvm/include/llvm/FuzzMutate/
RandomIRBuilder.h 35 /// operation's operands. This either selects an instruction in \c Insts or
37 Value *findOrCreateSource(BasicBlock &BB, ArrayRef<Instruction *> Insts);
39 /// operation's operands. This either selects an instruction in \c Insts that
43 Value *findOrCreateSource(BasicBlock &BB, ArrayRef<Instruction *> Insts,
46 Value *newSource(BasicBlock &BB, ArrayRef<Instruction *> Insts,
48 /// Find a viable user for \c V in \c Insts, which should all be contained in
50 void connectToSink(BasicBlock &BB, ArrayRef<Instruction *> Insts, Value *V);
52 void newSink(BasicBlock &BB, ArrayRef<Instruction *> Insts, Value *V);
53 Value *findPointer(BasicBlock &BB, ArrayRef<Instruction *> Insts,
  /src/external/apache2/llvm/dist/llvm/lib/FuzzMutate/
RandomIRBuilder.cpp 22 ArrayRef<Instruction *> Insts) {
23 return findOrCreateSource(BB, Insts, {}, anyType());
27 ArrayRef<Instruction *> Insts,
33 auto RS = makeSampler(Rand, make_filter_range(Insts, MatchesPred));
38 return newSource(BB, Insts, Srcs, Pred);
41 Value *RandomIRBuilder::newSource(BasicBlock &BB, ArrayRef<Instruction *> Insts,
48 Value *Ptr = findPointer(BB, Insts, Srcs, Pred);
96 ArrayRef<Instruction *> Insts, Value *V) {
98 for (auto &I : Insts) {
117 newSink(BB, Insts, V)
    [all...]
IRMutator.cpp 107 SmallVector<Instruction *, 32> Insts;
109 Insts.push_back(&*I);
110 if (Insts.size() < 1)
114 size_t IP = uniform<size_t>(IB.Rand, 0, Insts.size() - 1);
116 auto InstsBefore = makeArrayRef(Insts).slice(0, IP);
117 auto InstsAfter = makeArrayRef(Insts).slice(IP);
133 if (Value *Op = OpDesc->BuilderFunc(Srcs, Insts[IP])) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.h 56 /// return it in Insts.
57 void GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts);
61 InstSeq Insts;
MipsAnalyzeImmediate.cpp 109 void MipsAnalyzeImmediate::GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts) {
124 Insts.clear();
125 Insts.append(ShortestSeq->begin(), ShortestSeq->end());
153 // Set Insts to the shortest instruction sequence.
154 GetShortestSeq(SeqLs, Insts);
156 return Insts;
  /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/
SSAUpdater.h 141 LoadAndStorePromoter(ArrayRef<const Instruction *> Insts,
147 /// Insts is a list of loads and stores to promote, and Name is the basename
150 void run(const SmallVectorImpl<Instruction *> &Insts);
154 /// The Insts list is the one passed into the constructor. Clients should
157 const SmallVectorImpl<Instruction *> &Insts) const;
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineBasicBlock.h 113 Instructions Insts;
239 unsigned size() const { return (unsigned)Insts.size(); }
240 bool empty() const { return Insts.empty(); }
242 MachineInstr &instr_front() { return Insts.front(); }
243 MachineInstr &instr_back() { return Insts.back(); }
244 const MachineInstr &instr_front() const { return Insts.front(); }
245 const MachineInstr &instr_back() const { return Insts.back(); }
247 MachineInstr &front() { return Insts.front(); }
249 const MachineInstr &front() const { return Insts.front(); }
252 instr_iterator instr_begin() { return Insts.begin();
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
SSAUpdater.cpp 322 LoadAndStorePromoter(ArrayRef<const Instruction *> Insts,
324 if (Insts.empty()) return;
327 if (const LoadInst *LI = dyn_cast<LoadInst>(Insts[0]))
330 SomeVal = cast<StoreInst>(Insts[0])->getOperand(0);
337 void LoadAndStorePromoter::run(const SmallVectorImpl<Instruction *> &Insts) {
343 for (Instruction *User : Insts)
352 for (Instruction *User : Insts) {
401 if (!isInstInList(L, Insts)) continue;
417 if (!isInstInList(SI, Insts)) continue;
448 for (Instruction *User : Insts) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
GVNSink.cpp 122 SmallVector<Instruction *, 4> Insts;
135 Insts.clear();
142 Insts.push_back(BB->getTerminator()->getPrevNode());
144 if (Insts.empty())
149 ArrayRef<Instruction *> operator*() const { return Insts; }
160 for (auto II = Insts.begin(); II != Insts.end();) {
163 II = Insts.erase(II);
174 for (auto *Inst : Insts) {
184 Insts = NewInsts
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/
HWEventListener.h 144 HWPressureEvent(GenericReason reason, ArrayRef<InstRef> Insts,
146 : Reason(reason), AffectedInstructions(Insts), ResourceMask(Mask) {}
  /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/
llvm-mca.cpp 499 ArrayRef<MCInst> Insts = Region->getInstructions();
500 mca::CodeEmitter CE(*STI, *MAB, *MCE, Insts);
502 for (const MCInst &MCI : Insts) {
538 *STI, *MCII, CE, ShowEncoding, Insts, *IP));
541 std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
559 std::make_unique<mca::InstructionView>(*STI, *IP, Insts, MCPU));
563 std::make_unique<mca::SummaryView>(SM, Insts, DispatchWidth));
572 *STI, *IP, Insts, S.getNumIterations()));
577 *STI, *MCII, CE, ShowEncoding, Insts, *IP));
593 std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMLowOverheadLoops.cpp 185 SmallVector<MachineInstr *, 4> Insts;
236 SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();
237 for (unsigned i = 1; i < Insts.size(); ++i) {
238 MachineInstr *Next = Insts[i];
259 SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();
260 return isPredicatedOnVCTP(Insts.front(), Exclusive);
268 SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();
269 MachineInstr *VPT = Insts.front();
313 SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();
316 assert(isVPTOpcode(Insts.front()->getOpcode()) &
    [all...]
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenTarget.cpp 437 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
438 if (Insts.size() <= 2)
442 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
443 Instructions[Insts[i]] = std::make_unique<CodeGenInstruction>(Insts[i]);
449 std::unique_ptr<CodeGenInstruction>> &Insts,
453 const auto I = Insts.find(Rec);
454 if (!Rec || I == Insts.end())
471 const auto &Insts = getInstructions();
473 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records)
    [all...]
CodeBeadsGen.cpp 45 std::vector<Record *> Insts = Records.getAllDerivedDefinitions("Instruction");
PseudoLoweringEmitter.cpp 302 std::vector<Record *> Insts =
307 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
308 evaluateExpansion(Insts[i]);
AsmWriterEmitter.cpp 109 static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
111 AsmWriterInst FirstInst = Insts.back();
112 Insts.pop_back();
116 for (unsigned i = Insts.size(); i != 0; --i) {
117 unsigned DiffOp = Insts[i-1].MatchesAllButOneOp(FirstInst);
125 SimilarInsts.push_back(Insts[i-1]);
126 Insts.erase(Insts.begin()+i-1);
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
Assembler.h 51 void addInstructions(ArrayRef<MCInst> Insts, const DebugLoc &DL = DebugLoc());
  /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
ExecuteStage.cpp 131 SmallVector<InstRef, 8> Insts;
132 uint64_t Mask = HWS.analyzeResourcePressure(Insts);
137 HWPressureEvent Ev(HWPressureEvent::RESOURCES, Insts, Mask);
  /src/external/apache2/llvm/dist/llvm/tools/bugpoint/
CrashDebugger.cpp 770 std::vector<const Instruction *> &Insts) {
777 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
778 assert(!Insts[i]->isTerminator());
779 Instructions.insert(cast<Instruction>(VMap[Insts[i]]));
812 Insts.clear();
814 Insts.push_back(Inst);
846 bool ReduceCrashingMetadata::TestInsts(std::vector<Instruction *> &Insts) {
853 for (Instruction *I : Insts)
884 Insts.clear();
886 Insts.push_back(I)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64A57FPLoadBalancing.cpp 193 std::set<MachineInstr*> Insts;
207 Insts.insert(MI);
220 Insts.insert(MI);
224 bool contains(MachineInstr &MI) { return Insts.count(&MI) > 0; }
228 return Insts.size();
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/
Scheduler.h 254 /// Returns a mask of busy resources, and populates vector Insts with
257 uint64_t analyzeResourcePressure(SmallVectorImpl<InstRef> &Insts);
  /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Scalar/
Reassociate.h 123 void RecursivelyEraseDeadInsts(Instruction *I, OrderedSet &Insts);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
Legalizer.cpp 120 LegalizerWorkListManager(InstListTy &Insts, ArtifactListTy &Arts)
121 : InstList(Insts), ArtifactList(Arts) {}
159 // When insts change, we want to revisit them to legalize them again.
180 // Traverse BB in RPOT and within each basic block, add insts top down,
  /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
Scheduler.cpp 243 uint64_t Scheduler::analyzeResourcePressure(SmallVectorImpl<InstRef> &Insts) {
244 llvm::append_range(Insts, ReadySet);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachinePipeliner.cpp 2538 std::deque<SUnit *> &Insts) {
2548 for (std::deque<SUnit *>::iterator I = Insts.begin(), E = Insts.end(); I != E;
2643 SUnit *UseSU = Insts.at(MoveUse);
2644 SUnit *DefSU = Insts.at(MoveDef);
2646 Insts.erase(Insts.begin() + MoveUse);
2647 Insts.erase(Insts.begin() + MoveDef);
2649 Insts.erase(Insts.begin() + MoveDef)
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