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    Searched refs:Is32Bit (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/XRay/
InstrumentationMap.cpp 148 bool Is32Bit = ObjFile.getBinary()->makeTriple().isArch32Bit();
149 size_t ELFSledEntrySize = Is32Bit ? 16 : 32;
167 const int WordSize = Is32Bit ? 4 : 8;
178 if (Is32Bit)
183 if (Is32Bit)
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
X86RecognizableInstr.h 211 bool Is32Bit;
X86RecognizableInstr.cpp 107 Is32Bit = false;
114 Is32Bit = true;
843 UID, Is32Bit, OpPrefix == 0,
848 Is32Bit, OpPrefix == 0, IgnoresVEX_L || EncodeRC,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64InstructionSelector.cpp 1055 const bool Is32Bit = Size == 32;
1057 unsigned Opc = Is32Bit ? AArch64::FCSELSrrr : AArch64::FCSELDrrr;
1064 unsigned Opc = Is32Bit ? AArch64::CSELWr : AArch64::CSELXr;
1066 auto TryFoldBinOpIntoSelect = [&Opc, Is32Bit, &CC, &MRI,
1081 Opc = Is32Bit ? AArch64::CSNEGWr : AArch64::CSNEGXr;
1098 Opc = Is32Bit ? AArch64::CSINVWr : AArch64::CSINVXr;
1117 Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr;
1133 auto TryOptSelectCst = [&Opc, &True, &False, &CC, Is32Bit, &MRI,
1142 Register ZReg = Is32Bit ? AArch64::WZR : AArch64::XZR;
1149 Opc = Is32Bit ? AArch64::CSINCWr : AArch64::CSINCXr
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp 380 auto isLargeIntegerTy = [](bool Is32Bit, Type *Ty) {
382 return ITy->getBitWidth() > (Is32Bit ? 32U : 64U);
PPCISelDAGToDAG.cpp 3075 bool Is32Bit = InVT == MVT::i32;
3082 ToExtend = SDValue(CurDAG->getMachineNode(Is32Bit ? PPC::NOR : PPC::NOR8,
3087 if (Is32Bit) {
3108 if (!Is32Bit &&
3113 if (!Is32Bit &&
3118 assert(Is32Bit && "Should have handled the 32-bit sequences above.");
PPCISelLowering.cpp 13620 bool Is32Bit = FirstConversion == PPCISD::FCTIWZ ||
13636 if (Is32Bit && !isFPExtLoad(NextOp.getOperand(0).getOperand(0)))
13651 if (Is32Bit) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64InstrInfo.cpp 6138 bool Is32Bit = (DefMI->getOpcode() == AArch64::ANDWri);
6140 DefMI->getOperand(2).getImm(), Is32Bit ? 32 : 64);
6170 if (!Is32Bit && Imm < 32)
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 4765 bool Is32Bit = isInt<32>(ImmValue) || (!isGP64bit() && isUInt<32>(ImmValue));
4777 if (!loadImmediate(ImmValue, DstReg, Mips::NoRegister, Is32Bit, false,
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 61 static bool is32Bit(EVT VT) {
2693 bool Is32Bit = is32Bit(VT);
2694 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result);
2695 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result);
3510 if (is32Bit(VT))
3558 if (is32Bit(VT))
3582 if (is32Bit(VT))
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGBuiltin.cpp 14989 bool Is32Bit = false;
14995 Is32Bit = true;
15016 Ops[0], Is32Bit ? llvm::FixedVectorType::get(Int32Ty, 4)
15018 Ops[1] = Builder.CreateBitCast(Ops[1], Is32Bit ? Int32Ty : Int64Ty);

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