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    Searched refs:IsAnd (Results 1 - 10 of 10) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
OverflowInstAnalysis.h 36 /// IsAnd is set to true if the Op0 and Op1 are used as the first pattern.
40 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd,
42 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd);
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
OverflowInstAnalysis.cpp 22 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd,
56 (IsAnd && Pred == ICmpInst::Predicate::ICMP_NE &&
58 (!IsAnd && Pred == ICmpInst::Predicate::ICMP_EQ &&
69 bool IsAnd) {
71 return isCheckForZeroAndMulWithOverflow(Op0, Op1, IsAnd, Y);
InstructionSimplify.cpp 1430 ICmpInst *UnsignedICmp, bool IsAnd,
1450 EqPred == ICmpInst::ICMP_NE && !IsAnd)
1455 EqPred == ICmpInst::ICMP_EQ && IsAnd)
1462 return IsAnd ? UnsignedICmp : ZeroICmp;
1468 return IsAnd ? ZeroICmp : UnsignedICmp;
1476 if (UnsignedPred == ICmpInst::ICMP_UGE && IsAnd &&
1480 if (UnsignedPred == ICmpInst::ICMP_ULT && !IsAnd &&
1501 return IsAnd ? ZeroICmp : UnsignedICmp;
1507 return IsAnd ? UnsignedICmp : ZeroICmp;
1517 return IsAnd ? UnsignedICmp : ZeroICmp
    [all...]
LazyValueInfo.cpp 1170 bool IsAnd;
1172 IsAnd = true;
1174 IsAnd = false;
1182 if (isTrueDest ^ IsAnd) {
ScalarEvolution.cpp 7699 bool IsAnd = false;
7701 IsAnd = true;
7703 IsAnd = false;
7710 bool EitherMayExit = IsAnd ^ ExitIfTrue;
7719 const Constant *NeutralElement = ConstantInt::get(ExitCond->getType(), IsAnd);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineAndOrXor.cpp 398 ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, Value *A, Value *B, Value *C,
405 // If IsAnd is false, we get it in negated form:
416 ICmpInst::Predicate NewCC = IsAnd ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_NE;
490 return ConstantInt::get(LHS->getType(), !IsAnd);
512 return ConstantInt::get(LHS->getType(), !IsAnd);
519 ICmpInst *LHS, ICmpInst *RHS, bool IsAnd, Value *A, Value *B, Value *C,
529 if (!IsAnd) {
535 LHS, RHS, IsAnd, A, B, C, D, E,
541 RHS, LHS, IsAnd, A, D, E, B, C,
551 static Value *foldLogOpOfMaskedICmps(ICmpInst *LHS, ICmpInst *RHS, bool IsAnd,
    [all...]
InstCombineInternal.h 350 Value *foldLogicOfFCmps(FCmpInst *LHS, FCmpInst *RHS, bool IsAnd);
353 Instruction *CxtI, bool IsAnd,
362 // and i1 Op, SI / select i1 Op, i1 SI, i1 false (if IsAnd = true)
363 // or i1 Op, SI / select i1 Op, i1 true, i1 SI (if IsAnd = false)
366 bool IsAnd);
InstCombineSelect.cpp 2586 bool IsAnd) {
2594 Optional<bool> Res = isImpliedCondition(Op, CondVal, DL, IsAnd);
2602 if (IsAnd)
2613 if (IsAnd)
2723 bool IsAnd = match(FalseVal, m_Zero()) ? true : false;
2724 Value *Op1 = IsAnd ? TrueVal : FalseVal;
2725 if (isCheckForZeroAndMulWithOverflow(CondVal, Op1, IsAnd, Y)) {
2734 /* IsAnd */ IsAnd))
2739 if (auto *V = foldAndOrOfICmpsOfAndWithPow2(ICmp0, ICmp1, &SI, IsAnd,
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 549 SDValue foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
4946 SDValue DAGCombiner::foldLogicOfSetCCs(bool IsAnd, SDValue N0, SDValue N1,
4978 bool AndEqZero = IsAnd && CC1 == ISD::SETEQ && IsZero;
4980 bool AndGtNeg1 = IsAnd && CC1 == ISD::SETGT && IsNeg1;
4982 bool OrNeZero = !IsAnd && CC1 == ISD::SETNE && IsZero;
4984 bool OrLtZero = !IsAnd && CC1 == ISD::SETLT && IsZero;
4997 bool AndEqNeg1 = IsAnd && CC1 == ISD::SETEQ && IsNeg1;
4999 bool AndLtZero = IsAnd && CC1 == ISD::SETLT && IsZero;
5001 bool OrNeNeg1 = !IsAnd && CC1 == ISD::SETNE && IsNeg1;
5003 bool OrGtNeg1 = !IsAnd && CC1 == ISD::SETGT && IsNeg1
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 9556 bool IsAnd = And.getOpcode() == ISD::AND;
9565 if (IsAnd) {

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