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    Searched refs:IsFP (Results 1 - 21 of 21) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
Utils.h 377 bool IsFP);
381 int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
MachineIRBuilder.h 652 unsigned getBoolExtOp(bool IsVec, bool IsFP) const;
657 bool IsFP);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.h 112 bool IsFP) const;
MipsSEISelLowering.cpp 3327 bool IsFP) const {
3374 if (IsFP) {
3400 if (IsFP) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 5733 bool IsFP = ValueSVT.isFloatingPoint();
5740 Opc = IsFP ? X86::VGATHERDPSZ128rm : X86::VPGATHERDDZ128rm;
5742 Opc = IsFP ? X86::VGATHERDPSZ256rm : X86::VPGATHERDDZ256rm;
5744 Opc = IsFP ? X86::VGATHERDPSZrm : X86::VPGATHERDDZrm;
5746 Opc = IsFP ? X86::VGATHERDPDZ128rm : X86::VPGATHERDQZ128rm;
5748 Opc = IsFP ? X86::VGATHERDPDZ256rm : X86::VPGATHERDQZ256rm;
5750 Opc = IsFP ? X86::VGATHERDPDZrm : X86::VPGATHERDQZrm;
5752 Opc = IsFP ? X86::VGATHERQPSZ128rm : X86::VPGATHERQDZ128rm;
5754 Opc = IsFP ? X86::VGATHERQPSZ256rm : X86::VPGATHERQDZ256rm;
5756 Opc = IsFP ? X86::VGATHERQPSZrm : X86::VPGATHERQDZrm
    [all...]
X86ISelLowering.cpp 5029 bool isFP, SDValue &LHS, SDValue &RHS,
5031 if (!isFP) {
21780 bool IsFP = Op.getSimpleValueType().isFloatingPoint();
21781 if (IsFP && !Subtarget.hasSSE3())
21783 if (!IsFP && !Subtarget.hasSSSE3())
22897 bool isFP = Op1.getSimpleValueType().isFloatingPoint();
22900 if (isFP) {
23438 TranslateX86CC(CC, dl, /*IsFP*/ false, Op0, Op1, DAG);
23486 X86::CondCode CondCode = TranslateX86CC(CC, dl, /*IsFP*/ true, Op0, Op1, DAG);
24423 TranslateX86CC(CC, dl, /*IsFP*/ true, LHS, RHS, DAG)
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1325 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
Utils.cpp 970 bool IsFP) {
971 switch (TLI.getBooleanContents(IsVector, IsFP)) {
983 bool IsFP) {
984 switch (TLI.getBooleanContents(IsVector, IsFP)) {
MachineIRBuilder.cpp 431 unsigned MachineIRBuilder::getBoolExtOp(bool IsVec, bool IsFP) const {
433 switch (TLI->getBooleanContents(IsVec, IsFP)) {
445 bool IsFP) {
446 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP);
CombinerHelper.cpp 3110 int64_t Cst, bool IsVector, bool IsFP) {
3113 isConstTrueVal(TLI, Cst, IsVector, IsFP);
3137 bool IsFP = false;
3149 if (IsFP)
3157 IsFP = true;
3181 if (!isConstValidTrue(TLI, Ty.getScalarSizeInBits(), *MaybeCst, true, IsFP))
3186 if (!isConstValidTrue(TLI, Ty.getSizeInBits(), Cst, false, IsFP))
3984 /* IsFP = */ false)
  /src/external/apache2/llvm/dist/llvm/lib/Bitcode/Reader/
BitcodeReader.cpp 1070 bool IsFP = Ty->isFPOrFPVectorTy();
1072 if (!IsFP && !Ty->isIntOrIntVectorTy())
1079 return IsFP ? Instruction::FNeg : -1;
1084 bool IsFP = Ty->isFPOrFPVectorTy();
1086 if (!IsFP && !Ty->isIntOrIntVectorTy())
1093 return IsFP ? Instruction::FAdd : Instruction::Add;
1095 return IsFP ? Instruction::FSub : Instruction::Sub;
1097 return IsFP ? Instruction::FMul : Instruction::Mul;
1099 return IsFP ? -1 : Instruction::UDiv;
1101 return IsFP ? Instruction::FDiv : Instruction::SDiv
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIFrameLowering.cpp 57 bool IsFP) {
78 dbgs() << "Spilling " << (IsFP ? "FP" : "BP") << " to "
99 dbgs() << (IsFP ? "FP" : "BP") << " requires fallback spill to "
107 << (IsFP ? "FP" : "BP") << '\n');
110 LLVM_DEBUG(dbgs() << "Saving " << (IsFP ? "FP" : "BP") << " with copy to "
  /src/external/apache2/llvm/dist/llvm/include/llvm/AsmParser/
LLParser.h 581 bool IsFP);
583 unsigned Opc, bool IsFP);
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1512 bool IsFP, SDValue &LHS, SDValue &RHS,
1514 if (!IsFP) {
1956 bool IsFP = Op1.getSimpleValueType().isFloatingPoint();
1957 unsigned M68kCC = TranslateM68kCC(CC, DL, IsFP, Op0, Op1, DAG);
  /src/external/apache2/llvm/dist/llvm/lib/AsmParser/
LLParser.cpp 6189 int Res = parseUnaryOp(Inst, PFS, KeywordVal, /*IsFP*/ true);
6205 if (parseArithmetic(Inst, PFS, KeywordVal, /*IsFP*/ false))
6218 int Res = parseArithmetic(Inst, PFS, KeywordVal, /*IsFP*/ true);
6232 if (parseArithmetic(Inst, PFS, KeywordVal, /*IsFP*/ false))
6241 /*IsFP*/ false);
6829 /// If IsFP is false, then any integer operand is allowed, if it is true, any fp
6832 unsigned Opc, bool IsFP) {
6837 bool Valid = IsFP ? LHS->getType()->isFPOrFPVectorTy()
6969 /// If IsFP is false, then any integer operand is allowed, if it is true, any fp
6972 unsigned Opc, bool IsFP) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp 1322 bool IsFP = fieldFromInstruction(insn, 26, 1);
1325 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn)
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
LowerMatrixIntrinsics.cpp 1035 bool IsFP = Result.getElementType()->isFloatingPointTy();
1090 IsFP, Builder, AllowContraction, NumComputeOps);
  /src/external/apache2/llvm/dist/clang/lib/AST/
ASTContext.cpp 2177 IsSigned, IsFP, IsBF) \
2195 IsFP) \
3874 IsSigned, IsFP, IsBF) \
3879 IsFP && !IsBF) || \
3881 IsBF && !IsFP)) && \
3892 IsFP) \
3896 (EltTy->hasFloatingRepresentation() && IsFP)) && \
ItaniumMangle.cpp 3036 ElBits, IsSigned, IsFP, IsBF) \
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2844 bool IsFP = CmpOp0.getValueType().isFloatingPoint();
2845 assert (!Chain || IsFP);
2848 Chain ? CmpMode::StrictFP : IsFP ? CmpMode::FP : CmpMode::Int;
2857 assert(IsFP && "Unexpected integer comparison");
2874 assert(IsFP && "Unexpected integer comparison");
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAG.cpp 438 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
441 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;

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