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    Searched refs:JH7100_CLK_UART2_CORE (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
starfive-jh7100.h	169 #define JH7100_CLK_UART2_CORE 160
/src/sys/arch/riscv/starfive/
jh7100_clkc.c	115 #define JH7100_CLK_UART2_CORE 160 285 JH71X0CLKC_GATEDIV(JH7100_CLK_UART2_CORE, "uart2_core", 63, "perh0_src"),
/src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/starfive/
jh7100.dtsi	304 clocks = <&clkgen JH7100_CLK_UART2_CORE>,

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