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    Searched refs:JH7110_STGCLK_GRP0_MAIN (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
starfive,jh7110-crg.h	246 #define JH7110_STGCLK_GRP0_MAIN 17
/src/sys/arch/riscv/starfive/
jh7110_clkc.c	282 #define JH7110_STGCLK_GRP0_MAIN 17 727 JH71X0CLKC_GATE(JH7110_STGCLK_GRP0_MAIN, "mtrx_grp0_main", "cpu_bus"), // CLK_IS_CRITICAL

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