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    Searched refs:JH7110_SYSCLK_PLL0_DIV2 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
starfive,jh7110-crg.h	30 #define JH7110_SYSCLK_PLL0_DIV2 13
/src/sys/arch/riscv/starfive/
jh7110_clkc.c	61 #define JH7110_SYSCLK_PLL0_DIV2 13 438 JH71X0CLKC_DIV(JH7110_SYSCLK_PLL0_DIV2, "pll0_div2", 2, "pll0_out"),

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