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    Searched refs:JH7110_SYSCLK_UART4_CORE (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
starfive,jh7110-crg.h	171 #define JH7110_SYSCLK_UART4_CORE 154
/src/sys/arch/riscv/starfive/
jh7110_clkc.c	202 #define JH7110_SYSCLK_UART4_CORE 154 614 JH71X0CLKC_GATEDIV(JH7110_SYSCLK_UART4_CORE, "uart4_core",10, "perh_root"),
/src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/starfive/
jh7110.dtsi	664 clocks = <&syscrg JH7110_SYSCLK_UART4_CORE>,

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