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    Searched refs:JZ_ICMSR0 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/evbmips/ingenic/
intr.c	234 writereg(JZ_ICMSR0, 0x0c000000); 264 writereg(JZ_ICMSR0, ll); 279 writereg(JZ_ICMSR0, mask); 359 writereg(JZ_ICMSR0, 1 << irq);
/src/sys/arch/mips/ingenic/
ingenic_regs.h	303 #define JZ_ICMSR0 0x10001008 /* sets bits in mask register */

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