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    Searched refs:JZ_ICMSR1 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/evbmips/ingenic/
intr.c	265 writereg(JZ_ICMSR1, hh); 307 writereg(JZ_ICMSR1, mask); 357 writereg(JZ_ICMSR1, 1 << (irq - 32));
/src/sys/arch/mips/ingenic/
ingenic_regs.h	309 #define JZ_ICMSR1 0x10001028 /* sets bits in mask register */

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