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    Searched refs:JZ_SRBC (Results 1 - 3 of 3) sorted by relevancy

/src/sys/arch/mips/ingenic/
ingenic_ehci.c	134 reg = readreg(JZ_SRBC); 136 writereg(JZ_SRBC, reg); 140 reg = readreg(JZ_SRBC); 142 writereg(JZ_SRBC, reg);
apbus.c	237 printf("JZ_SRBC %08x\n", readreg(JZ_SRBC));
ingenic_regs.h	276 #define JZ_SRBC 0x100000c4 /* Soft Reset & Bus Control */

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