| /src/crypto/external/bsd/heimdal/dist/lib/hcrypto/ |
| sha.c | 68 #define K0 0x5a827999
105 DO(0,F0,K0);
106 DO(1,F0,K0);
107 DO(2,F0,K0);
108 DO(3,F0,K0);
109 DO(4,F0,K0);
110 DO(5,F0,K0);
111 DO(6,F0,K0);
112 DO(7,F0,K0);
113 DO(8,F0,K0);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPURegBankCombiner.cpp | 62 Register &Val, Register &K0, Register &K1);
90 Register &K0, Register &K1) {
91 // 4 operand commutes of: min(max(Val, K0), K1).
93 // Find K0 and Val from inner instr: max(K0, Val) or max(Val, K0).
94 // 4 operand commutes of: max(min(Val, K1), K0).
95 // Find K0 from outer instr: max(min(...), K0) or max(K0, min(...))
[all...] |
| SIISelLowering.cpp | 8373 const SDValue K0 = DAG.getConstantFP(K0Val, SL, MVT::f32);
8383 SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT);
9851 ConstantSDNode *K0 = dyn_cast<ConstantSDNode>(Op0.getOperand(1));
9852 if (!K0)
9856 if (K0->getAPIntValue().sge(K1->getAPIntValue()))
9859 if (K0->getAPIntValue().uge(K1->getAPIntValue()))
9863 EVT VT = K0->getValueType(0);
9867 Op0.getOperand(0), SDValue(K0, 0), SDValue(K1, 0));
9906 ConstantFPSDNode *K0 = getSplatConstantFP(Op0.getOperand(1));
9907 if (!K0)
[all...] |
| AMDGPUInstructionSelector.cpp | 617 const int64_t K0 = ConstSrc0->Value.getSExtValue();
619 uint32_t Lo16 = static_cast<uint32_t>(K0) & 0xffff;
|
| AMDGPULegalizerInfo.cpp | 2067 auto K0 = B.buildFConstant(S64, BitsToDouble(UINT64_C(0x3df0000000000000)));
2070 auto Mul = B.buildFMul(S64, Trunc, K0, Flags);
|
| AMDGPUISelLowering.cpp | 2592 SDValue K0 = DAG.getConstantFP(BitsToDouble(UINT64_C(0x3df0000000000000)), SL,
2597 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0);
|
| /src/common/lib/libc/hash/rmd160/ |
| rmd160.c | 80 #define K0 0x00000000U
209 R(a, b, c, d, e, F0, K0, 11, 0);
210 R(e, a, b, c, d, F0, K0, 14, 1);
211 R(d, e, a, b, c, F0, K0, 15, 2);
212 R(c, d, e, a, b, F0, K0, 12, 3);
213 R(b, c, d, e, a, F0, K0, 5, 4);
214 R(a, b, c, d, e, F0, K0, 8, 5);
215 R(e, a, b, c, d, F0, K0, 7, 6);
216 R(d, e, a, b, c, F0, K0, 9, 7);
217 R(c, d, e, a, b, F0, K0, 11, 8)
[all...] |
| /src/crypto/external/bsd/netpgp/dist/src/netpgpverify/ |
| rmd160.c | 62 #define K0 0x00000000U
187 R(a, b, c, d, e, F0, K0, 11, 0);
188 R(e, a, b, c, d, F0, K0, 14, 1);
189 R(d, e, a, b, c, F0, K0, 15, 2);
190 R(c, d, e, a, b, F0, K0, 12, 3);
191 R(b, c, d, e, a, F0, K0, 5, 4);
192 R(a, b, c, d, e, F0, K0, 8, 5);
193 R(e, a, b, c, d, F0, K0, 7, 6);
194 R(d, e, a, b, c, F0, K0, 9, 7);
195 R(c, d, e, a, b, F0, K0, 11, 8)
[all...] |
| /src/external/lgpl3/mpfr/dist/src/ |
| cos.c | 135 mpfr_prec_t K0, K, precy, m, k, l;
178 K0 = __gmpfr_isqrt (precy / 3);
179 m = precy + 2 * MPFR_INT_CEIL_LOG2 (precy) + 2 * K0 + 4;
221 K = K0 + 1 + MAX(0, MPFR_GET_EXP(r)) / 2;
222 /* since K0 >= 0, if EXP(r) < 0, then K >= 1, thus EXP(r) - 2K <= -3;
|
| /src/lib/libcrypt/ |
| crypt.c | 709 DCL_BLOCK(K, K0, K1);
719 PERM6464(K,K0,K1,(const unsigned char *)key,(C_block *)PC1ROT);
721 STORE(K&~0x03030303L, K0&~0x03030303L, K1, *help);
724 STORE(K,K0,K1,*help);
726 PERM6464(K,K0,K1,(const unsigned char *)help,ptabp);
727 STORE(K&~0x03030303L, K0&~0x03030303L, K1, *help);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 598 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K0)
603 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::EXT), Mips::K0)
604 .addReg(Mips::K0)
641 SrcReg = Mips::K0;
822 Reg = Mips::K0;
827 BuildMI(MBB, MI, DL, TII.get(Op), Mips::K0)
|
| MipsRegisterInfo.cpp | 152 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP
|
| MipsSEInstrInfo.cpp | 299 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);
300 SrcReg = Mips::K0;
305 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0);
306 SrcReg = Mips::K0;
380 // Load HI/LO through K0. Notably the DestReg is encoded into the
382 unsigned Reg = Mips::K0;
|
| MicroMipsSizeReduction.cpp | 383 Mips::S6, Mips::S7, Mips::T8, Mips::T9, Mips::K0, Mips::K1, Mips::GP,
|
| /src/external/bsd/pcc/dist/pcc/arch/mips/ |
| macdefs.h | 175 #define K0 26
290 { -1 }, /* $k0 */ \
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| X86InstPrinterCommon.cpp | 369 // of the two. Here, we pick k0, k2, k4, k6, but we could as well
376 printRegName(OS, X86::K0);
|
| X86MCTargetDesc.cpp | 258 {codeview::RegisterId::AMD64_K0, X86::K0},
|
| /src/crypto/external/apache2/openssl/dist/crypto/aes/asm/ |
| aes-riscv64.pl | 101 my $K0 = $loopcntr;
360 ld $K0,16($KEYP)
430 xor $T0,$T0,$K0 # XOR in key
580 # K0,K1 are aliases for loopcntr,KEYP
583 ld $K0,16($KEYP)
649 xor $T4,$T4,$K0 # xor in key
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 318 ENTRY(K0) \
|
| X86Disassembler.cpp | 2243 mcInst.addOperand(MCOperand::createReg(X86::K0 + maskRegNum));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 553 case X86::K0:
|
| X86AsmParser.cpp | 2786 if (RegNo == X86::K0)
2787 return Error(RegLoc, "Register k0 can't be used as write mask");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | 4485 /// instruction with two %k0 reads.
4489 /// %k4 = KXNORrr %k0, %k0
4810 // Using %k0 as the undef input register is a performance heuristic based
4811 // on the assumption that %k0 is used less frequently than the other mask
4815 case X86::KSET0W: return Expand2AddrKreg(MIB, get(X86::KXORWrr), X86::K0);
4816 case X86::KSET0D: return Expand2AddrKreg(MIB, get(X86::KXORDrr), X86::K0);
4817 case X86::KSET0Q: return Expand2AddrKreg(MIB, get(X86::KXORQrr), X86::K0);
4818 case X86::KSET1W: return Expand2AddrKreg(MIB, get(X86::KXNORWrr), X86::K0);
4819 case X86::KSET1D: return Expand2AddrKreg(MIB, get(X86::KXNORDrr), X86::K0);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 3252 case Mips::T9: return Mips::K0;
3253 case Mips::K0: return Mips::K1;
5605 case Mips::F26: return Mips::K0;
5644 case Mips::COP026: return Mips::K0;
6174 .Case("k0", 26)
|
| /src/crypto/external/apache2/openssl/lib/libcrypto/arch/riscv64/ |
| aes-riscv64.S | 512 # K0,K1 are aliases for loopcntr,KEYP
|
