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    Searched refs:L3RT_PIPELINE_LATE (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/powerpc/include/oea/
spr.h	282 #define L3RT_PIPELINE_LATE 0x00000100 /* Pipelined (register-register) synchronous late-write SRAM */
/src/sys/arch/powerpc/oea/
cpu_subr.c	142 { L3CR_L3RT, L3RT_PIPELINE_LATE, " (LW SRAM)" },

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