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Searched refs:LB_SYNC_RESET_SEL (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_compressor.c	`95 set_reg_field_value(value, 3, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL); 96 set_reg_field_value(value, 1, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2); 112 set_reg_field_value(value, 2, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL); 113 set_reg_field_value(value, 0, LB_SYNC_RESET_SEL, LB_SYNC_RESET_SEL2);`
/src/sys/external/bsd/drm2/dist/drm/radeon/
btcd.h	`166 #define LB_SYNC_RESET_SEL 0x6b28`
nid.h	`874 #define LB_SYNC_RESET_SEL 0x6b28`
radeon_btc_dpm.c	`1749 if (((RREG32(LB_SYNC_RESET_SEL) & LB_SYNC_RESET_SEL_MASK) >> LB_SYNC_RESET_SEL_SHIFT) != 1)`
radeon_ni_dpm.c	`1092 tmp = RREG32(LB_SYNC_RESET_SEL) & LB_SYNC_RESET_SEL_MASK;`

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