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  /src/sys/arch/arm/s3c2xx0/
s3c24x0_lcd.c 115 reg &= ~LCDCON1_ENVID;
230 lcdcon1 &= ~(LCDCON1_BPPMODE_MASK|LCDCON1_ENVID);
280 bus_space_write_4(iot, ioh, LCDC_LCDCON1, lcdcon1 | LCDCON1_ENVID);
482 ~LCDCON1_ENVID &
s3c24x0reg.h 177 #define LCDCON1_ENVID (1<<0) /* enable video */

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