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    Searched refs:LEVEL0_MPLL_FB_DIV (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
rv6xxd.h	83 # define LEVEL0_MPLL_FB_DIV(x) ((x) << 8)
radeon_rv6xx_dpm.c	394 WREG32_P(MPLL_FREQ_LEVEL_0 + (index * 4), LEVEL0_MPLL_FB_DIV(divider),

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Indexes created Sat Oct 10 00:27:21 UTC 2026