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    Searched refs:LRINT (Results 1 - 16 of 16) sorted by relevancy

  /src/tests/lib/libm/
t_fe_round.c 7 * Testing IEEE-754 rounding modes (and lrint)
98 "Checking IEEE 754 rounding modes using lrint(3)");
106 LRINT,
113 [LRINT] = "lrint",
127 * Call the lrint(3)-family function.
136 case LRINT:
137 received = lrint(values[i].input);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 878 LRINT,
  /src/external/gpl3/gcc/dist/gcc/
internal-fn.def 378 DEF_INTERNAL_FLT_FN (IRINT, ECF_CONST, lrint, unary_convert)
382 DEF_INTERNAL_FLT_FLOATN_FN (LRINT, ECF_CONST, lrint, unary_convert)
386 DEF_INTERNAL_FLT_FLOATN_FN (LLRINT, ECF_CONST, lrint, unary_convert)
match.pd 8134 (for rints (IRINT LRINT LLRINT)
8141 lfn (LFLOOR LCEIL LROUND LRINT)
builtins.cc 2013 CASE_MATHFN_FLOATN (LRINT) \
3212 conversion (lrint).
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 366 case ISD::LRINT: return "lrint";
LegalizeFloatTypes.cpp 830 case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break;
1777 case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break;
LegalizeDAG.cpp 1006 case ISD::LRINT:
4095 case ISD::LRINT:
SelectionDAGBuilder.cpp 6240 case Intrinsic::lrint:
6247 case Intrinsic::lrint: Opcode = ISD::LRINT; break;
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp 500 case Intrinsic::lrint: Opcode = ISD::LRINT; break;
PPCISelLowering.cpp 509 setOperationAction(ISD::LRINT, MVT::f64, Legal);
510 setOperationAction(ISD::LRINT, MVT::f32, Legal);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetLoweringBase.cpp 877 setOperationAction(ISD::LRINT, VT, Expand);
  /src/external/gpl3/gcc.old/dist/gcc/
match.pd 6570 (for rints (IRINT LRINT LLRINT)
6577 lfn (LFLOOR LCEIL LROUND LRINT)
builtins.cc 1993 CASE_MATHFN (LRINT) \
2890 conversion (lrint).
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 286 setOperationAction(ISD::LRINT, MVT::f32, Custom);
287 setOperationAction(ISD::LRINT, MVT::f64, Custom);
292 setOperationAction(ISD::LRINT, MVT::i64, Custom);
712 setOperationAction(ISD::LRINT, MVT::f80, Custom);
21509 assert(DstVT == MVT::i64 && "Invalid LRINT/LLRINT to lower!");
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 697 setOperationAction(ISD::LRINT, Ty, Legal);

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