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  /src/external/gpl3/gdb/dist/sim/testsuite/bfin/
hwloop-lt-bits.s 14 LT1 = R6;
20 R0 = LT1;
hwloop-bits.S 25 R0 = LT1;
60 LT1 = R6;
77 LT1 = R4;
92 LT1 = R4;
c_loopsetup_topbotcntr.s 52 LT1 = R0;
83 LT1 = R3;
se_loop_mv2lb_stall.S 463 LT1 = r0;
477 LT1 = r0;
492 LT1 = r0;
508 LT1 = r0;
525 LT1 = r0;
545 LT1 = r0;
se_loop_mv2lc_stall.S 465 LT1 = r0;
479 LT1 = r0;
494 LT1 = r0;
510 LT1 = r0;
527 LT1 = r0;
545 LT1 = r0;
se_loop_mv2lt_stall.S 466 LT1 = r0;
481 LT1 = r0;
497 LT1 = r0;
514 LT1 = r0;
532 LT1 = r0;
548 LT1 = [sp++];
se_regmv_usp_sysreg.S 76 LT1 = USP;
77 R1 = LT1;
c_except_sys_sstep.S 115 LT1 = r0;
c_interr_excpt.S 115 LT1 = r0;
c_interr_nested.S 114 LT1 = r0;
c_mmr_timer.S 110 LT1 = r0;
c_mode_supervisor.S 112 LT1 = r0;
c_progctrl_csync_mmr.S 115 LT1 = r0;
c_progctrl_excpt.S 114 LT1 = r0;
c_progctrl_raise_rt_i_n.S 112 LT1 = r0;
push-pop.s 69 dmm_check LT1
se_bug_ui.S 115 LT1 = r0;
se_bug_ui2.S 115 LT1 = r0;
  /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/
hwloop-lt-bits.s 14 LT1 = R6;
20 R0 = LT1;
hwloop-bits.S 25 R0 = LT1;
60 LT1 = R6;
77 LT1 = R4;
92 LT1 = R4;
c_loopsetup_topbotcntr.s 52 LT1 = R0;
83 LT1 = R3;
se_loop_mv2lb_stall.S 463 LT1 = r0;
477 LT1 = r0;
492 LT1 = r0;
508 LT1 = r0;
525 LT1 = r0;
545 LT1 = r0;
se_loop_mv2lc_stall.S 465 LT1 = r0;
479 LT1 = r0;
494 LT1 = r0;
510 LT1 = r0;
527 LT1 = r0;
545 LT1 = r0;
se_loop_mv2lt_stall.S 466 LT1 = r0;
481 LT1 = r0;
497 LT1 = r0;
514 LT1 = r0;
532 LT1 = r0;
548 LT1 = [sp++];
se_regmv_usp_sysreg.S 76 LT1 = USP;
77 R1 = LT1;

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