HomeSort by: relevance | last modified time | path
    Searched refs:LaneIdx (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64PostLegalizerLowering.cpp 651 auto LaneIdx = getSplatIndex(MI);
652 if (!LaneIdx)
656 if (*LaneIdx >= SrcTy.getNumElements())
692 MatchInfo.second = *LaneIdx;
AArch64InstructionSelector.cpp 146 /// The lane inserted into is defined by \p LaneIdx. The vector source
150 Register EltReg, unsigned LaneIdx,
264 Register VecReg, unsigned LaneIdx,
2490 unsigned LaneIdx = Offset / 64;
2492 DstReg, DstRB, LLT::scalar(64), SrcReg, LaneIdx, MIB);
3676 emitLaneInsert(None, Tmp.getReg(0), Src1Reg, /* LaneIdx */ 0, RB, MIB);
3680 Src2Reg, /* LaneIdx */ 1, RB, MIB);
3752 Register VecReg, unsigned LaneIdx, MachineIRBuilder &MIRBuilder) const {
3783 if (LaneIdx == 0) {
3802 MIRBuilder.buildInstr(CopyOpc, {*DstReg}, {InsertReg}).addImm(LaneIdx);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 602 static bool checkHighLaneIndex(SDNode *DL, SDValue &LaneOp, int &LaneIdx) {
617 LaneIdx = DLidx->getSExtValue() + EVidx->getSExtValue();
626 SDValue &LaneOp, int &LaneIdx) {
628 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx)) {
630 if (!checkHighLaneIndex(Op0.getNode(), LaneOp, LaneIdx))
646 int LaneIdx = -1; // Will hold the lane index.
650 LaneIdx)) {
654 LaneIdx))
658 SDValue LaneIdxVal = CurDAG->getTargetConstant(LaneIdx, dl, MVT::i64);
689 int LaneIdx;
    [all...]
AArch64ISelLowering.cpp 9951 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64);
9955 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx);
10024 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64);
10025 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86InstCombineIntrinsic.cpp 1965 unsigned LaneIdx = Lane * VWidthPerLane;
1967 unsigned Idx = LaneIdx + Elt + InnerVWidthPerLane * OpNum;
X86ISelLowering.cpp 6953 int LaneIdx = (Idx / NumEltsPerLane) * NumEltsPerLane;
6956 DemandedLHS.setBit(LaneIdx + 2 * LocalIdx + 0);
6957 DemandedLHS.setBit(LaneIdx + 2 * LocalIdx + 1);
6960 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx + 0);
6961 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx + 1);
21827 unsigned LaneIdx = LExtIndex / NumEltsPerLane;
21828 X = extract128BitVector(X, LaneIdx * NumEltsPerLane, DAG, DL);
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 6643 int64_t LaneIdx;
6655 if (parseSwizzleOperand(LaneIdx,
6659 Imm = encodeBitmaskPerm(BITMASK_MAX - GroupSize + 1, LaneIdx, 0);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 7710 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i32);
7711 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx);
14251 SDValue LaneIdx = DAG.getConstant(Idx, dl, MVT::i32);
14252 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx);
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CGBuiltin.cpp 17553 Value *LaneIdx = llvm::ConstantInt::get(getLLVMContext(), *LaneIdxConst);
17584 return Builder.CreateCall(Callee, {Ptr, Vec, LaneIdx});

Completed in 135 milliseconds