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    Searched refs:LegalOps (Results 1 - 7 of 7) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetLowering.h 3266 bool LegalOps;
3272 DAG(InDAG), LegalTys(LT), LegalOps(LO) {}
3275 bool LegalOperations() const { return LegalOps; }
3635 bool LegalOps, bool OptForSize,
3642 bool LegalOps, bool OptForSize,
3646 getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth);
3657 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
3660 return getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.h 785 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
PPCISelLowering.cpp 16338 bool LegalOps, bool OptForSize,
16361 getNegatedExpression(N2, DAG, LegalOps, OptForSize, N2Cost, Depth + 1);
16373 SDValue NegN0 = getNegatedExpression(N0, DAG, LegalOps, OptForSize,
16377 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize,
16398 return TargetLowering::getNegatedExpression(Op, DAG, LegalOps, OptForSize,
16826 bool LegalOps = !DCI.isBeforeLegalizeOps();
16839 if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize))
16844 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize))
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 1793 if (DemandedBits.isOneValue() && !TLO.LegalOps && !VT.isVector())
2749 if (Updated && !IdentityLHS && !IdentityRHS && !TLO.LegalOps) {
5981 bool LegalOps, bool OptForSize,
6030 if (LegalOps && !IsOpLegal)
6060 if (LegalOps && !IsOpLegal)
6081 if (LegalOps && !isOperationLegalOrCustom(ISD::FSUB, VT))
6088 getNegatedExpression(X, DAG, LegalOps, OptForSize, CostX, Depth);
6096 getNegatedExpression(Y, DAG, LegalOps, OptForSize, CostY, Depth);
6144 getNegatedExpression(X, DAG, LegalOps, OptForSize, CostX, Depth);
6152 getNegatedExpression(Y, DAG, LegalOps, OptForSize, CostY, Depth)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 5977 if (!TLO.LegalOps)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 1648 if (!TLO.LegalOps)
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 18206 if (!TLO.LegalOps)

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