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    Searched refs:Lg2 (Results 1 - 8 of 8) sorted by relevancy

  /src/lib/libm/src/
e_log2.c 26 Lg2 = 3.999999999940941908e-01, /* 3FD99999 9997FA04 */
71 t1= w*(Lg2+w*(Lg4+w*Lg6));
e_log2f.c 28 Lg2 = 4.0000000596e-01, /* 3ECCCCCD */
72 t1= w*(Lg2+w*(Lg4+w*Lg6));
e_log.c 35 * R(z) ~ Lg1*s +Lg2*s +Lg3*s +Lg4*s +Lg5*s +Lg6*s +Lg7*s
77 Lg2 = 3.999999999940941908e-01, /* 3FD99999 9997FA04 */
124 t1= w*(Lg2+w*(Lg4+w*Lg6));
e_logf.c 29 Lg2 = 4.0000000596e-01, /* 3ECCCCCD */
75 t1= w*(Lg2+w*(Lg4+w*Lg6));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 4807 unsigned Lg2 = C.countTrailingZeros();
4813 unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Lg2);
4820 int64_t Pow2MinusOne = (1ULL << Lg2) - 1;
4849 AArch64_AM::ASR, Lg2);
4851 ResultReg = emitASR_ri(VT, VT, SelectReg, Lg2);
AArch64ISelLowering.cpp 12012 unsigned Lg2 = Divisor.countTrailingZeros();
12014 SDValue Pow2MinusOne = DAG.getConstant((1ULL << Lg2) - 1, DL, VT);
12028 DAG.getNode(ISD::SRA, DL, VT, CSel, DAG.getConstant(Lg2, DL, MVT::i64));
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 15403 unsigned Lg2 = (IsNegPow2 ? -Divisor : Divisor).countTrailingZeros();
15404 SDValue ShiftAmt = DAG.getConstant(Lg2, DL, VT);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 22577 unsigned Lg2 = Divisor.countTrailingZeros();
22580 if (Lg2 == 1)
22586 APInt Lg2Mask = APInt::getLowBitsSet(VT.getSizeInBits(), Lg2);
22600 DAG.getNode(ISD::SRA, DL, VT, CMov, DAG.getConstant(Lg2, DL, MVT::i8));
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