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    Searched refs:Lo16 (Results 1 - 7 of 7) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
AMDGPUBaseInfo.cpp 1758 int16_t Lo16 = static_cast<int16_t>(Literal);
1760 return Lo16 == Hi16 && isInlinableLiteral16(Lo16, HasInv2Pi);
1764 int16_t Lo16 = static_cast<int16_t>(Literal);
1766 return isInlinableIntLiteral(Lo16);
1771 return Lo16 == Hi16 && isInlinableIntLiteral(Lo16);
1777 int16_t Lo16 = static_cast<int16_t>(Literal);
1784 return Lo16 == Hi16;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
SIMCCodeEmitter.cpp 276 uint16_t Lo16 = static_cast<uint16_t>(Imm);
277 uint32_t Encoding = getLit16Encoding(Lo16, STI);
AMDGPUInstPrinter.cpp 467 uint16_t Lo16 = static_cast<uint16_t>(Imm);
468 printImmediate16(Lo16, STI, O);
  /src/sys/net80211/
ieee80211_crypto_tkip.c 443 static __inline u16 Lo16(u32 val)
511 TTAK[0] = Lo16(IV32);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUInstructionSelector.cpp 619 uint32_t Lo16 = static_cast<uint32_t>(K0) & 0xffff;
623 .addImm(Lo16 | (Hi16 << 16));
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 895 MachineInstrBuilder LO16, HI16;
908 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
915 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), DstReg);
925 LO16 = LO16.addImm(SOImmValV1);
927 LO16.cloneMemRefs(MI);
929 LO16.setMIFlags(MIFlags);
931 LO16.addImm(Pred).addReg(PredReg).add(condCodeOp());
934 LO16.add(makeImplicit(MI.getOperand(1)));
935 TransferImpOps(MI, LO16, HI16)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 1021 // If Hi32 is zero and the Lo16(in Lo32) can be presented as a positive 16 bit
1022 // value, we can use LI for Lo16 without generating leading ones then add the
1312 if (uint32_t Lo16 = Lo_32(Imm) & 0xffff) {
1314 getI32Imm(Lo16));

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