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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUInstrInfo.h 65 uint8_t LodIndex;
AMDGPULegalizerInfo.cpp 4198 if (mi_match(MI.getOperand(ArgOffset + Intr->LodIndex).getReg(), *MRI,
4211 MI.RemoveOperand(ArgOffset + Intr->LodIndex);
AMDGPUInstructionSelector.cpp 1562 const MachineOperand &Lod = MI.getOperand(ArgOffset + Intr->LodIndex);
SIISelLowering.cpp 6061 Op.getOperand(ArgOffset + Intr->LodIndex))) {

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