| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| pll.h | 11 int *N1, int *M1, int *N2, int *M2, int *P);
|
| nouveau_nvkm_subdev_clk_pllnv04.c | 156 int M1, N1, M2, N2, log2P;
182 for (M2 = minM2; M2 <= maxM2; M2++) {
183 if (calcclk1/M2 < minU2)
185 if (calcclk1/M2 > maxU2)
189 N2 = (clkP * M2 + calcclk1/2) / calcclk1;
197 if (N2/M2 < 4 || N2/M2 > 10)
200 calcclk2 = calcclk1 * N2 / M2;
[all...] |
| nouveau_nvkm_subdev_clk_nv04.c | 40 int N1, M1, N2, M2, P;
41 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);
47 pv->M2 = M2;
|
| nouveau_nvkm_subdev_clk_nv40.c | 67 int M2 = (coef & 0x00ff0000) >> 16;
76 if (M2)
77 khz = khz * N2 / M2;
130 int *N1, int *M1, int *N2, int *M2, int *log2P)
143 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);
156 int N1, M1, N2, M2, log2P;
161 &N1, &M1, &N2, &M2, &log2P);
165 if (N2 == M2) {
170 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| nouveau_nvkm_subdev_clk_nv50.c | 171 int N1, N2, M1, M2;
180 M2 = (coef & 0x00ff0000) >> 16;
186 if (M2)
187 freq = freq * N2 / M2;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| pll.h | 11 uint8_t N1, M1, N2, M2;
13 uint8_t M1, N1, M2, N2;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/devinit/ |
| nouveau_nvkm_subdev_devinit_nv50.c | 46 int N1, M1, N2, M2, P;
55 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
67 (M2 << 16) | N2);
|
| nouveau_nvkm_subdev_devinit_nv04.c | 215 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */
222 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4;
301 bool single_stage = !pv->NM2 || pv->N2 == pv->M2;
368 int N1, M1, N2, M2, P;
375 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);
383 pv.M2 = M2;
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| sunxi-bananapi-m2-plus-v1.2.dtsi | 6 #include "sunxi-bananapi-m2-plus.dtsi"
10 * Bananapi M2+ v1.2 uses a GPIO line to change the effective
|
| sun8i-h2-plus-bananapi-m2-zero.dts | 5 * Based on sun8i-h3-bananapi-m2-plus.dts, which is:
17 model = "Banana Pi BPI-M2-Zero";
18 compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";
44 label = "bananapi-m2-zero:red:pwr";
|
| r8a7793.dtsi | 3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
|
| r8a7791.dtsi | 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| nouveau_nvkm_subdev_fb_ramnv40.c | 45 int N1, M1, N2, M2;
54 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);
60 if (N2 == M2) {
65 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;
|
| nouveau_nvkm_subdev_fb_ramnv50.c | 236 int N1, M1, N2, M2, P;
337 &N1, &M1, &N2, &M2, &P);
|
| nouveau_nvkm_subdev_fb_ramgk104.c | 139 int N2, M2, P2;
165 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2);
995 int *N2, int *M2, int *P2)
1002 *M2 = 1;
1072 &ram->N2, &ram->M2, &ram->P2);
|
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_onetimeauth/poly1305/sse2/ |
| poly1305_sse2.c | 208 xmmi M0, M1, M2, M3, M4;
394 M2 = _mm_and_si128(MMASK, T5);
432 v02 = M2;
441 v12 = M2;
461 v22 = M2;
464 v32 = M2;
480 v42 = M2;
630 M2 = _mm_unpacklo_epi32(T8, _mm_setzero_si128());
633 M2 = _mm_slli_epi64(M2, 12)
[all...] |
| /src/sys/dev/isa/ |
| esp_isa.c | 194 #define M2 0x05
204 if (!((p1 == M1 && p2 == M2) || (p1 == M2 && p2 == M1)))
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_hw.c | 145 pllvals->N2 = pllvals->M2 = 1;
159 pllvals->M2 = (pll1 >> 4) & 0x7;
212 if (!pv->M1 || !pv->M2)
215 return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;
|
| nouveau_dispnv04_crtc.c | 165 NV_DEBUG(drm, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n",
166 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/ti/ |
| k3-am654-base-board.dts | 163 AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
|
| k3-am65-iot2050-common.dtsi | 162 /* (M2) WKUP_GPIO0_36 */
|
| /src/libexec/ld.aout_so/ |
| ld.so.arm.uue | 381 M2^($(*#AU?[_ZP``4.,;``#:`7"@X[1P"^4``%;C!@"@$2,U`!O(<!OEO"`;
445 M2^4$P(SB,,$+Y00P7.4<,4OE1T]+XF!!"^4!D*#C3)$+Y8$!`.H0<(?C@``7
605 M2^($`$#B`"#5Y3(``.H`(-7E)0!2XRL``!H!,/7E8P!3XRL```H%``#*3`!3
1036 M2*#A`TB$X00`H.%@&0#K?!`;Y0!0H.$$`*#AY!D`ZX`@&^65`@+@>&`;Y08X
1093 M2^(1(*#C!""`Y9X``.H&,*#C00``Z@$PH.,D,`OE)`!+XB`@H..$``#J`3"@
1101 M2^(*(*#C!""`Y40``.H(,*#C)#`+Y20`2^(+(*#C+```Z@@PH.,D,`OE)`!+
1203 M2(`;Y0``4.,$@*"A"`"@X0```.H&`*#A,)`;Y4"`&^4)D&C@2)`+Y0!@H.$)
|
| ld.so.sparc.uue | 150 M2)80(`&2DB```H``!M`'O_34`F`(T@(``)_"0`H!````@<?@"('H``"=X[^8
|
