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    Searched refs:MCRegisterClass (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsOptionRecord.h 66 const MCRegisterClass *GPR32RegClass;
67 const MCRegisterClass *GPR64RegClass;
68 const MCRegisterClass *FGR32RegClass;
69 const MCRegisterClass *FGR64RegClass;
70 const MCRegisterClass *AFGR64RegClass;
71 const MCRegisterClass *MSA128BRegClass;
72 const MCRegisterClass *COP0RegClass;
73 const MCRegisterClass *COP2RegClass;
74 const MCRegisterClass *COP3RegClass;
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
RegisterAliasing.h 42 // Construct a tracker from an MCRegisterClass.
45 const MCRegisterClass &RegClass);
RegisterAliasing.cpp 33 const MCRegisterClass &RegClass)
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCRegisterInfo.h 30 /// MCRegisterClass - Base class of TargetRegisterClass.
31 class MCRegisterClass {
137 using regclass_iterator = const MCRegisterClass *;
160 const MCRegisterClass *Classes; // Pointer to the regclass array
355 const MCRegisterClass *C, unsigned NC,
466 const MCRegisterClass *RC) const;
543 const MCRegisterClass& getRegClass(unsigned i) const {
548 const char *getRegClassName(const MCRegisterClass *Class) const {
  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCRegisterInfo.cpp 25 const MCRegisterClass *RC) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFMIChecking.cpp 107 const MCRegisterClass *GPR64RegClass =
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/
AMDGPUBaseInfo.h 25 class MCRegisterClass;
772 unsigned getRegBitWidth(const MCRegisterClass &RC);
AMDGPUBaseInfo.cpp 1467 const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID);
1589 // Avoid using MCRegisterClass::getSize, since that function will go away
1675 unsigned getRegBitWidth(const MCRegisterClass &RC) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
X86MCTargetDesc.cpp 428 const MCRegisterClass &GR32RC = MRI.getRegClass(X86::GR32RegClassID);
429 const MCRegisterClass &VR128XRC = MRI.getRegClass(X86::VR128XRegClassID);
430 const MCRegisterClass &VR256XRC = MRI.getRegClass(X86::VR256XRegClassID);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetRegisterInfo.h 53 const MCRegisterClass *MC;
  /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
RegisterFile.cpp 162 const MCRegisterClass &RC = MRI.getRegClass(RCE.RegisterClassID);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/AsmParser/
AVRAsmParser.cpp 78 MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID];
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64InstPrinter.cpp 1306 const MCRegisterClass &FPR128RC =
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 2460 const MCRegisterClass RC = TRI->getRegClass(RCID);
4051 const MCRegisterClass &AGRP32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
4091 const MCRegisterClass &VGRP32 = MRI->getRegClass(AMDGPU::VGPR_32RegClassID);
4092 const MCRegisterClass &AGRP32 = MRI->getRegClass(AMDGPU::AGPR_32RegClassID);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMInstPrinter.cpp 262 const MCRegisterClass &MRC = MRI.getRegClass(ARM::GPRRegClassID);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 3352 const MCRegisterClass *RC_in = &ARMMCRegisterClasses[ARM::MQPRRegClassID];
3353 const MCRegisterClass *RC_out = (VectorList.Count == 2) ?
4493 const MCRegisterClass *RC;
4914 const MCRegisterClass *RC = (Spacing == 1) ?
6952 const MCRegisterClass &GPR = MRI->getRegClass(ARM::GPRRegClassID);
7409 const MCRegisterClass &MRC = MRI->getRegClass(ARM::GPRRegClassID);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 6162 const MCRegisterClass &WRegClass =
6164 const MCRegisterClass &XRegClass =

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