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    Searched refs:MC_SEQ_CNTL_3 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 787 #define MC_SEQ_CNTL_3 0x3600
radeon_ci_dpm.c 1503 WREG32_P(MC_SEQ_CNTL_3, CAC_EN, ~CAC_EN);
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c 1117 PHM_WRITE_FIELD(hwmgr->device, MC_SEQ_CNTL_3, CAC_EN, 0x1);

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