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    Searched refs:MESONGXBB_CLOCK_USB1_DDR_BRIDGE (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/amlogic/
mesongxbb_clkc.h	95 #define MESONGXBB_CLOCK_USB1_DDR_BRIDGE 64
mesongxbb_clkc.c	221 MESON_CLK_GATE(MESONGXBB_CLOCK_USB1_DDR_BRIDGE, "usb1_ddr_bridge", "clk81", HHI_GCLK_MPEG2, 8),

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