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    Searched refs:MG_PLL_BIAS (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.c 2877 pll_state->mg_pll_bias = (m2div_frac ? DKL_PLL_BIAS_FRAC_EN_H : 0) |
2928 pll_state->mg_pll_bias =
2948 pll_state->mg_pll_bias &= pll_state->mg_pll_bias_mask;
3176 hw_state->mg_pll_bias = I915_READ(MG_PLL_BIAS(tc_port));
3189 hw_state->mg_pll_bias &= hw_state->mg_pll_bias_mask;
3254 hw_state->mg_pll_bias = I915_READ(DKL_PLL_BIAS(tc_port));
3255 hw_state->mg_pll_bias &= (DKL_PLL_BIAS_FRAC_EN_H |
3390 val = I915_READ(MG_PLL_BIAS(tc_port));
3392 val |= hw_state->mg_pll_bias;
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 10186 #define MG_PLL_BIAS(tc_port) _MMIO_PORT((tc_port), _MG_PLL_BIAS_PORT1, \

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