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    Searched refs:MG_PLL_SSC (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.c 2872 pll_state->mg_pll_ssc = DKL_PLL_SSC_IREF_NDIV_RATIO(iref_ndiv) |
2913 pll_state->mg_pll_ssc =
3174 hw_state->mg_pll_ssc = I915_READ(MG_PLL_SSC(tc_port));
3248 hw_state->mg_pll_ssc = I915_READ(DKL_PLL_SSC(tc_port));
3249 hw_state->mg_pll_ssc &= (DKL_PLL_SSC_IREF_NDIV_RATIO_MASK |
3388 I915_WRITE(MG_PLL_SSC(tc_port), hw_state->mg_pll_ssc);
3454 val |= hw_state->mg_pll_ssc;
3656 "mg_pll_frac_lock: 0x%x, mg_pll_ssc: 0x%x,
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  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 10166 #define MG_PLL_SSC(tc_port) _MMIO_PORT((tc_port), _MG_PLL_SSC_PORT1, \

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